1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name #ifndef _RX_TIMING_INFO_H_ 19*5113495bSYour Name #define _RX_TIMING_INFO_H_ 20*5113495bSYour Name 21*5113495bSYour Name #define NUM_OF_DWORDS_RX_TIMING_INFO 5 22*5113495bSYour Name 23*5113495bSYour Name struct rx_timing_info { 24*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 25*5113495bSYour Name uint32_t phy_timestamp_1_lower_32 : 32; 26*5113495bSYour Name uint32_t phy_timestamp_1_upper_32 : 32; 27*5113495bSYour Name uint32_t phy_timestamp_2_lower_32 : 32; 28*5113495bSYour Name uint32_t phy_timestamp_2_upper_32 : 32; 29*5113495bSYour Name uint32_t residual_phase_offset : 12, 30*5113495bSYour Name reserved : 20; 31*5113495bSYour Name #else 32*5113495bSYour Name uint32_t phy_timestamp_1_lower_32 : 32; 33*5113495bSYour Name uint32_t phy_timestamp_1_upper_32 : 32; 34*5113495bSYour Name uint32_t phy_timestamp_2_lower_32 : 32; 35*5113495bSYour Name uint32_t phy_timestamp_2_upper_32 : 32; 36*5113495bSYour Name uint32_t reserved : 20, 37*5113495bSYour Name residual_phase_offset : 12; 38*5113495bSYour Name #endif 39*5113495bSYour Name }; 40*5113495bSYour Name 41*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_LOWER_32_OFFSET 0x00000000 42*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_LOWER_32_LSB 0 43*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_LOWER_32_MSB 31 44*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_LOWER_32_MASK 0xffffffff 45*5113495bSYour Name 46*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_UPPER_32_OFFSET 0x00000004 47*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_UPPER_32_LSB 0 48*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_UPPER_32_MSB 31 49*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_1_UPPER_32_MASK 0xffffffff 50*5113495bSYour Name 51*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_LOWER_32_OFFSET 0x00000008 52*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_LOWER_32_LSB 0 53*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_LOWER_32_MSB 31 54*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_LOWER_32_MASK 0xffffffff 55*5113495bSYour Name 56*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_UPPER_32_OFFSET 0x0000000c 57*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_UPPER_32_LSB 0 58*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_UPPER_32_MSB 31 59*5113495bSYour Name #define RX_TIMING_INFO_PHY_TIMESTAMP_2_UPPER_32_MASK 0xffffffff 60*5113495bSYour Name 61*5113495bSYour Name #define RX_TIMING_INFO_RESIDUAL_PHASE_OFFSET_OFFSET 0x00000010 62*5113495bSYour Name #define RX_TIMING_INFO_RESIDUAL_PHASE_OFFSET_LSB 0 63*5113495bSYour Name #define RX_TIMING_INFO_RESIDUAL_PHASE_OFFSET_MSB 11 64*5113495bSYour Name #define RX_TIMING_INFO_RESIDUAL_PHASE_OFFSET_MASK 0x00000fff 65*5113495bSYour Name 66*5113495bSYour Name #define RX_TIMING_INFO_RESERVED_OFFSET 0x00000010 67*5113495bSYour Name #define RX_TIMING_INFO_RESERVED_LSB 12 68*5113495bSYour Name #define RX_TIMING_INFO_RESERVED_MSB 31 69*5113495bSYour Name #define RX_TIMING_INFO_RESERVED_MASK 0xfffff000 70*5113495bSYour Name 71*5113495bSYour Name #endif 72