xref: /wlan-driver/fw-api/hw/wcn7750/v1/tcl_status_ring.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _TCL_STATUS_RING_H_
19 #define _TCL_STATUS_RING_H_
20 
21 #define NUM_OF_DWORDS_TCL_STATUS_RING 8
22 
23 struct tcl_status_ring {
24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
25              uint32_t gse_ctrl                                                :  4,
26                       ase_fse_sel                                             :  1,
27                       cache_op_res                                            :  2,
28                       index_search_en                                         :  1,
29                       msdu_cnt_n                                              : 24;
30              uint32_t msdu_byte_cnt_n                                         : 32;
31              uint32_t msdu_timestmp_n                                         : 32;
32              uint32_t cmd_meta_data_31_0                                      : 32;
33              uint32_t cmd_meta_data_63_32                                     : 32;
34              uint32_t hash_indx_val                                           : 20,
35                       cache_set_num                                           :  4,
36                       reserved_5a                                             :  8;
37              uint32_t reserved_6a                                             : 32;
38              uint32_t reserved_7a                                             : 20,
39                       ring_id                                                 :  8,
40                       looping_count                                           :  4;
41 #else
42              uint32_t msdu_cnt_n                                              : 24,
43                       index_search_en                                         :  1,
44                       cache_op_res                                            :  2,
45                       ase_fse_sel                                             :  1,
46                       gse_ctrl                                                :  4;
47              uint32_t msdu_byte_cnt_n                                         : 32;
48              uint32_t msdu_timestmp_n                                         : 32;
49              uint32_t cmd_meta_data_31_0                                      : 32;
50              uint32_t cmd_meta_data_63_32                                     : 32;
51              uint32_t reserved_5a                                             :  8,
52                       cache_set_num                                           :  4,
53                       hash_indx_val                                           : 20;
54              uint32_t reserved_6a                                             : 32;
55              uint32_t looping_count                                           :  4,
56                       ring_id                                                 :  8,
57                       reserved_7a                                             : 20;
58 #endif
59 };
60 
61 #define TCL_STATUS_RING_GSE_CTRL_OFFSET                                             0x00000000
62 #define TCL_STATUS_RING_GSE_CTRL_LSB                                                0
63 #define TCL_STATUS_RING_GSE_CTRL_MSB                                                3
64 #define TCL_STATUS_RING_GSE_CTRL_MASK                                               0x0000000f
65 
66 #define TCL_STATUS_RING_ASE_FSE_SEL_OFFSET                                          0x00000000
67 #define TCL_STATUS_RING_ASE_FSE_SEL_LSB                                             4
68 #define TCL_STATUS_RING_ASE_FSE_SEL_MSB                                             4
69 #define TCL_STATUS_RING_ASE_FSE_SEL_MASK                                            0x00000010
70 
71 #define TCL_STATUS_RING_CACHE_OP_RES_OFFSET                                         0x00000000
72 #define TCL_STATUS_RING_CACHE_OP_RES_LSB                                            5
73 #define TCL_STATUS_RING_CACHE_OP_RES_MSB                                            6
74 #define TCL_STATUS_RING_CACHE_OP_RES_MASK                                           0x00000060
75 
76 #define TCL_STATUS_RING_INDEX_SEARCH_EN_OFFSET                                      0x00000000
77 #define TCL_STATUS_RING_INDEX_SEARCH_EN_LSB                                         7
78 #define TCL_STATUS_RING_INDEX_SEARCH_EN_MSB                                         7
79 #define TCL_STATUS_RING_INDEX_SEARCH_EN_MASK                                        0x00000080
80 
81 #define TCL_STATUS_RING_MSDU_CNT_N_OFFSET                                           0x00000000
82 #define TCL_STATUS_RING_MSDU_CNT_N_LSB                                              8
83 #define TCL_STATUS_RING_MSDU_CNT_N_MSB                                              31
84 #define TCL_STATUS_RING_MSDU_CNT_N_MASK                                             0xffffff00
85 
86 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_OFFSET                                      0x00000004
87 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_LSB                                         0
88 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_MSB                                         31
89 #define TCL_STATUS_RING_MSDU_BYTE_CNT_N_MASK                                        0xffffffff
90 
91 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_OFFSET                                      0x00000008
92 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_LSB                                         0
93 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_MSB                                         31
94 #define TCL_STATUS_RING_MSDU_TIMESTMP_N_MASK                                        0xffffffff
95 
96 #define TCL_STATUS_RING_CMD_META_DATA_31_0_OFFSET                                   0x0000000c
97 #define TCL_STATUS_RING_CMD_META_DATA_31_0_LSB                                      0
98 #define TCL_STATUS_RING_CMD_META_DATA_31_0_MSB                                      31
99 #define TCL_STATUS_RING_CMD_META_DATA_31_0_MASK                                     0xffffffff
100 
101 #define TCL_STATUS_RING_CMD_META_DATA_63_32_OFFSET                                  0x00000010
102 #define TCL_STATUS_RING_CMD_META_DATA_63_32_LSB                                     0
103 #define TCL_STATUS_RING_CMD_META_DATA_63_32_MSB                                     31
104 #define TCL_STATUS_RING_CMD_META_DATA_63_32_MASK                                    0xffffffff
105 
106 #define TCL_STATUS_RING_HASH_INDX_VAL_OFFSET                                        0x00000014
107 #define TCL_STATUS_RING_HASH_INDX_VAL_LSB                                           0
108 #define TCL_STATUS_RING_HASH_INDX_VAL_MSB                                           19
109 #define TCL_STATUS_RING_HASH_INDX_VAL_MASK                                          0x000fffff
110 
111 #define TCL_STATUS_RING_CACHE_SET_NUM_OFFSET                                        0x00000014
112 #define TCL_STATUS_RING_CACHE_SET_NUM_LSB                                           20
113 #define TCL_STATUS_RING_CACHE_SET_NUM_MSB                                           23
114 #define TCL_STATUS_RING_CACHE_SET_NUM_MASK                                          0x00f00000
115 
116 #define TCL_STATUS_RING_RESERVED_5A_OFFSET                                          0x00000014
117 #define TCL_STATUS_RING_RESERVED_5A_LSB                                             24
118 #define TCL_STATUS_RING_RESERVED_5A_MSB                                             31
119 #define TCL_STATUS_RING_RESERVED_5A_MASK                                            0xff000000
120 
121 #define TCL_STATUS_RING_RESERVED_6A_OFFSET                                          0x00000018
122 #define TCL_STATUS_RING_RESERVED_6A_LSB                                             0
123 #define TCL_STATUS_RING_RESERVED_6A_MSB                                             31
124 #define TCL_STATUS_RING_RESERVED_6A_MASK                                            0xffffffff
125 
126 #define TCL_STATUS_RING_RESERVED_7A_OFFSET                                          0x0000001c
127 #define TCL_STATUS_RING_RESERVED_7A_LSB                                             0
128 #define TCL_STATUS_RING_RESERVED_7A_MSB                                             19
129 #define TCL_STATUS_RING_RESERVED_7A_MASK                                            0x000fffff
130 
131 #define TCL_STATUS_RING_RING_ID_OFFSET                                              0x0000001c
132 #define TCL_STATUS_RING_RING_ID_LSB                                                 20
133 #define TCL_STATUS_RING_RING_ID_MSB                                                 27
134 #define TCL_STATUS_RING_RING_ID_MASK                                                0x0ff00000
135 
136 #define TCL_STATUS_RING_LOOPING_COUNT_OFFSET                                        0x0000001c
137 #define TCL_STATUS_RING_LOOPING_COUNT_LSB                                           28
138 #define TCL_STATUS_RING_LOOPING_COUNT_MSB                                           31
139 #define TCL_STATUS_RING_LOOPING_COUNT_MASK                                          0xf0000000
140 
141 #endif
142