1*5113495bSYour Name /*
2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3*5113495bSYour Name *
4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for
5*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the
6*5113495bSYour Name * above copyright notice and this permission notice appear in all
7*5113495bSYour Name * copies.
8*5113495bSYour Name *
9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE.
17*5113495bSYour Name */
18*5113495bSYour Name
19*5113495bSYour Name #ifndef _DP_RH_RX_H_
20*5113495bSYour Name #define _DP_RH_RX_H_
21*5113495bSYour Name
22*5113495bSYour Name #include <dp_types.h>
23*5113495bSYour Name #include <dp_rx.h>
24*5113495bSYour Name #include "dp_rh.h"
25*5113495bSYour Name
26*5113495bSYour Name /**
27*5113495bSYour Name * dp_rx_desc_pool_init_rh() - Initialize Rx Descriptor pool(s)
28*5113495bSYour Name * @soc: Handle to DP Soc structure
29*5113495bSYour Name * @rx_desc_pool: Rx descriptor pool handler
30*5113495bSYour Name * @pool_id: Rx descriptor pool ID
31*5113495bSYour Name *
32*5113495bSYour Name * Return: None
33*5113495bSYour Name */
34*5113495bSYour Name QDF_STATUS dp_rx_desc_pool_init_rh(struct dp_soc *soc,
35*5113495bSYour Name struct rx_desc_pool *rx_desc_pool,
36*5113495bSYour Name uint32_t pool_id);
37*5113495bSYour Name
38*5113495bSYour Name /**
39*5113495bSYour Name * dp_rx_desc_pool_deinit_rh() - De-initialize Rx Descriptor pool(s)
40*5113495bSYour Name * @soc: Handle to DP Soc structure
41*5113495bSYour Name * @rx_desc_pool: Rx descriptor pool handler
42*5113495bSYour Name * @pool_id: Rx descriptor pool ID
43*5113495bSYour Name *
44*5113495bSYour Name * Return: None
45*5113495bSYour Name */
46*5113495bSYour Name void dp_rx_desc_pool_deinit_rh(struct dp_soc *soc,
47*5113495bSYour Name struct rx_desc_pool *rx_desc_pool,
48*5113495bSYour Name uint32_t pool_id);
49*5113495bSYour Name
50*5113495bSYour Name /**
51*5113495bSYour Name * dp_rx_desc_cookie_2_va_rh() - Convert RX Desc cookie ID to VA
52*5113495bSYour Name * @soc:Handle to DP Soc structure
53*5113495bSYour Name * @cookie: cookie used to lookup virtual address
54*5113495bSYour Name *
55*5113495bSYour Name * Return: Rx descriptor virtual address
56*5113495bSYour Name */
57*5113495bSYour Name static inline
dp_rx_desc_cookie_2_va_rh(struct dp_soc * soc,uint32_t cookie)58*5113495bSYour Name struct dp_rx_desc *dp_rx_desc_cookie_2_va_rh(struct dp_soc *soc,
59*5113495bSYour Name uint32_t cookie)
60*5113495bSYour Name {
61*5113495bSYour Name return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
62*5113495bSYour Name }
63*5113495bSYour Name
64*5113495bSYour Name #define DP_PEER_METADATA_VDEV_ID_MASK 0x003f0000
65*5113495bSYour Name #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
66*5113495bSYour Name #define DP_PEER_METADATA_OFFLOAD_MASK 0x01000000
67*5113495bSYour Name #define DP_PEER_METADATA_OFFLOAD_SHIFT 24
68*5113495bSYour Name
69*5113495bSYour Name #define DP_PEER_METADATA_VDEV_ID_GET_RH(_peer_metadata) \
70*5113495bSYour Name (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
71*5113495bSYour Name >> DP_PEER_METADATA_VDEV_ID_SHIFT)
72*5113495bSYour Name
73*5113495bSYour Name #define DP_PEER_METADATA_OFFLOAD_GET_RH(_peer_metadata) \
74*5113495bSYour Name (((_peer_metadata) & DP_PEER_METADATA_OFFLOAD_MASK) \
75*5113495bSYour Name >> DP_PEER_METADATA_OFFLOAD_SHIFT)
76*5113495bSYour Name
77*5113495bSYour Name static inline uint16_t
dp_rx_peer_metadata_peer_id_get_rh(struct dp_soc * soc,uint32_t peer_metadata)78*5113495bSYour Name dp_rx_peer_metadata_peer_id_get_rh(struct dp_soc *soc, uint32_t peer_metadata)
79*5113495bSYour Name {
80*5113495bSYour Name struct htt_rx_peer_metadata_v0 *metadata =
81*5113495bSYour Name (struct htt_rx_peer_metadata_v0 *)&peer_metadata;
82*5113495bSYour Name
83*5113495bSYour Name return metadata->peer_id;
84*5113495bSYour Name }
85*5113495bSYour Name
86*5113495bSYour Name /**
87*5113495bSYour Name * dp_rx_data_flush() - Flush RX data after reaping from RX rings
88*5113495bSYour Name *
89*5113495bSYour Name * @data: reference to flush RX data
90*5113495bSYour Name *
91*5113495bSYour Name * Return: None
92*5113495bSYour Name */
93*5113495bSYour Name void
94*5113495bSYour Name dp_rx_data_flush(void *data);
95*5113495bSYour Name
96*5113495bSYour Name /**
97*5113495bSYour Name * dp_rx_data_indication_handler() - Indicate when RX data is available in rings
98*5113495bSYour Name *
99*5113495bSYour Name * @soc:DP soc reference
100*5113495bSYour Name * @data_ind: Data indication message info
101*5113495bSYour Name * @vdev_id: Vdev id
102*5113495bSYour Name * @peer_id: Peer id
103*5113495bSYour Name * @msdu_count: Number of MSDUs available in message
104*5113495bSYour Name *
105*5113495bSYour Name * Return: None
106*5113495bSYour Name */
107*5113495bSYour Name void
108*5113495bSYour Name dp_rx_data_indication_handler(struct dp_soc *soc, qdf_nbuf_t data_ind,
109*5113495bSYour Name uint16_t vdev_id, uint16_t peer_id,
110*5113495bSYour Name uint16_t msdu_count);
111*5113495bSYour Name
112*5113495bSYour Name /**
113*5113495bSYour Name * dp_rx_frag_indication_handler() - Indicate when RX frag data is available in ring
114*5113495bSYour Name *
115*5113495bSYour Name * @soc:DP soc reference
116*5113495bSYour Name * @data_ind: Data indication message info
117*5113495bSYour Name * @vdev_id: Vdev id
118*5113495bSYour Name * @peer_id: Peer id
119*5113495bSYour Name *
120*5113495bSYour Name * Return: None
121*5113495bSYour Name */
122*5113495bSYour Name void
123*5113495bSYour Name dp_rx_frag_indication_handler(struct dp_soc *soc, qdf_nbuf_t data_ind,
124*5113495bSYour Name uint16_t vdev_id, uint16_t peer_id);
125*5113495bSYour Name
126*5113495bSYour Name static inline bool
dp_rx_intrabss_handle_nawds_rh(struct dp_soc * soc,struct dp_txrx_peer * ta_peer,qdf_nbuf_t nbuf_copy,struct cdp_tid_rx_stats * tid_stats,uint8_t link_id)127*5113495bSYour Name dp_rx_intrabss_handle_nawds_rh(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
128*5113495bSYour Name qdf_nbuf_t nbuf_copy,
129*5113495bSYour Name struct cdp_tid_rx_stats *tid_stats,
130*5113495bSYour Name uint8_t link_id)
131*5113495bSYour Name {
132*5113495bSYour Name return false;
133*5113495bSYour Name }
134*5113495bSYour Name
135*5113495bSYour Name /**
136*5113495bSYour Name * dp_wbm_get_rx_desc_from_hal_desc_rh() - NOP in RH arch implementation
137*5113495bSYour Name *
138*5113495bSYour Name * @soc: Handle to DP Soc structure
139*5113495bSYour Name * @ring_desc: ring descriptor structure pointer
140*5113495bSYour Name * @r_rx_desc: pointer to a pointer of Rx Desc
141*5113495bSYour Name *
142*5113495bSYour Name * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
143*5113495bSYour Name */
144*5113495bSYour Name static inline
dp_wbm_get_rx_desc_from_hal_desc_rh(struct dp_soc * soc,void * ring_desc,struct dp_rx_desc ** r_rx_desc)145*5113495bSYour Name QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_rh(
146*5113495bSYour Name struct dp_soc *soc,
147*5113495bSYour Name void *ring_desc,
148*5113495bSYour Name struct dp_rx_desc **r_rx_desc)
149*5113495bSYour Name {
150*5113495bSYour Name return QDF_STATUS_SUCCESS;
151*5113495bSYour Name }
152*5113495bSYour Name
153*5113495bSYour Name static inline
dp_rx_word_mask_subscribe_rh(struct dp_soc * soc,uint32_t * msg_word,void * rx_filter)154*5113495bSYour Name void dp_rx_word_mask_subscribe_rh(struct dp_soc *soc,
155*5113495bSYour Name uint32_t *msg_word,
156*5113495bSYour Name void *rx_filter)
157*5113495bSYour Name {
158*5113495bSYour Name }
159*5113495bSYour Name
160*5113495bSYour Name static inline
dp_peer_get_reo_hash_rh(struct dp_vdev * vdev,struct cdp_peer_setup_info * setup_info,enum cdp_host_reo_dest_ring * reo_dest,bool * hash_based,uint8_t * lmac_peer_id_msb)161*5113495bSYour Name void dp_peer_get_reo_hash_rh(struct dp_vdev *vdev,
162*5113495bSYour Name struct cdp_peer_setup_info *setup_info,
163*5113495bSYour Name enum cdp_host_reo_dest_ring *reo_dest,
164*5113495bSYour Name bool *hash_based,
165*5113495bSYour Name uint8_t *lmac_peer_id_msb)
166*5113495bSYour Name {
167*5113495bSYour Name }
168*5113495bSYour Name
169*5113495bSYour Name static inline
dp_reo_remap_config_rh(struct dp_soc * soc,uint32_t * remap0,uint32_t * remap1,uint32_t * remap2)170*5113495bSYour Name bool dp_reo_remap_config_rh(struct dp_soc *soc,
171*5113495bSYour Name uint32_t *remap0,
172*5113495bSYour Name uint32_t *remap1,
173*5113495bSYour Name uint32_t *remap2)
174*5113495bSYour Name {
175*5113495bSYour Name return false;
176*5113495bSYour Name }
177*5113495bSYour Name
178*5113495bSYour Name /**
179*5113495bSYour Name * dp_rx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
180*5113495bSYour Name * @soc: DP soc structure
181*5113495bSYour Name * @hal_soc: Handle to HAL Soc structure
182*5113495bSYour Name * @quota: quota to process
183*5113495bSYour Name * @hal_ring_hdl: Destination ring pointer
184*5113495bSYour Name * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
185*5113495bSYour Name * @last_prefetched_sw_desc: input & output param of last prefetch SW desc
186*5113495bSYour Name *
187*5113495bSYour Name * Return: None
188*5113495bSYour Name */
189*5113495bSYour Name static inline
dp_rx_prefetch_hw_sw_nbuf_desc(struct dp_soc * soc,hal_soc_handle_t hal_soc,uint32_t quota,hal_ring_handle_t hal_ring_hdl,hal_ring_desc_t * last_prefetched_hw_desc,struct dp_rx_desc ** last_prefetched_sw_desc)190*5113495bSYour Name void dp_rx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
191*5113495bSYour Name hal_soc_handle_t hal_soc,
192*5113495bSYour Name uint32_t quota,
193*5113495bSYour Name hal_ring_handle_t hal_ring_hdl,
194*5113495bSYour Name hal_ring_desc_t *last_prefetched_hw_desc,
195*5113495bSYour Name struct dp_rx_desc **last_prefetched_sw_desc)
196*5113495bSYour Name {
197*5113495bSYour Name }
198*5113495bSYour Name
199*5113495bSYour Name /**
200*5113495bSYour Name * dp_peer_rx_reorder_queue_setup_rh() - NOP for RH arch implementation
201*5113495bSYour Name * @soc: Handle to HAL Soc structure
202*5113495bSYour Name * @peer: DP peer structure
203*5113495bSYour Name * @tid_bitmap: tids to be set up
204*5113495bSYour Name * @ba_window_size: BA window size
205*5113495bSYour Name *
206*5113495bSYour Name * Return: None
207*5113495bSYour Name */
208*5113495bSYour Name static inline
dp_peer_rx_reorder_queue_setup_rh(struct dp_soc * soc,struct dp_peer * peer,uint32_t tid_bitmap,uint32_t ba_window_size)209*5113495bSYour Name QDF_STATUS dp_peer_rx_reorder_queue_setup_rh(struct dp_soc *soc,
210*5113495bSYour Name struct dp_peer *peer,
211*5113495bSYour Name uint32_t tid_bitmap,
212*5113495bSYour Name uint32_t ba_window_size)
213*5113495bSYour Name {
214*5113495bSYour Name return QDF_STATUS_SUCCESS;
215*5113495bSYour Name }
216*5113495bSYour Name #endif
217