1*5113495bSYour Name /*
2*5113495bSYour Name * Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved.
3*5113495bSYour Name * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name *
5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for
6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the
7*5113495bSYour Name * above copyright notice and this permission notice appear in all
8*5113495bSYour Name * copies.
9*5113495bSYour Name *
10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE.
18*5113495bSYour Name */
19*5113495bSYour Name
20*5113495bSYour Name #ifndef _HAL_REO_BE_H_
21*5113495bSYour Name #define _HAL_REO_BE_H_
22*5113495bSYour Name
23*5113495bSYour Name #include "hal_be_hw_headers.h"
24*5113495bSYour Name #include "hal_rx.h"
25*5113495bSYour Name #include "hal_reo.h"
26*5113495bSYour Name
27*5113495bSYour Name #define HAL_REO_QUEUE_EXT_DESC 10
28*5113495bSYour Name #define HAL_MAX_REO2SW_RINGS 8
29*5113495bSYour Name #define HAL_NUM_RX_RING_PER_IX_MAP 8
30*5113495bSYour Name
31*5113495bSYour Name #if defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT) && \
32*5113495bSYour Name defined(RX_REO_QUEUE_STATISTICS_COUNTER_INDEX_MASK)
hal_update_stats_counter_index(uint32_t * reo_queue_desc,uint8_t vdev_stats_id)33*5113495bSYour Name static inline void hal_update_stats_counter_index(uint32_t *reo_queue_desc,
34*5113495bSYour Name uint8_t vdev_stats_id)
35*5113495bSYour Name {
36*5113495bSYour Name HAL_DESC_SET_FIELD(reo_queue_desc, RX_REO_QUEUE,
37*5113495bSYour Name STATISTICS_COUNTER_INDEX, vdev_stats_id);
38*5113495bSYour Name }
39*5113495bSYour Name #else
hal_update_stats_counter_index(uint32_t * reo_queue_desc,uint8_t vdev_stats_id)40*5113495bSYour Name static inline void hal_update_stats_counter_index(uint32_t *reo_queue_desc,
41*5113495bSYour Name uint8_t vdev_stats_id)
42*5113495bSYour Name {
43*5113495bSYour Name }
44*5113495bSYour Name #endif
45*5113495bSYour Name
46*5113495bSYour Name /* Proto-types */
47*5113495bSYour Name uint32_t hal_get_reo_reg_base_offset_be(void);
48*5113495bSYour Name
49*5113495bSYour Name int hal_reo_send_cmd_be(hal_soc_handle_t hal_soc_hdl,
50*5113495bSYour Name hal_ring_handle_t hal_ring_hdl,
51*5113495bSYour Name enum hal_reo_cmd_type cmd,
52*5113495bSYour Name void *params);
53*5113495bSYour Name
54*5113495bSYour Name /* REO status ring routines */
55*5113495bSYour Name void
56*5113495bSYour Name hal_reo_queue_stats_status_be(hal_ring_desc_t ring_desc,
57*5113495bSYour Name void *st_handle,
58*5113495bSYour Name hal_soc_handle_t hal_soc_hdl);
59*5113495bSYour Name void
60*5113495bSYour Name hal_reo_flush_queue_status_be(hal_ring_desc_t ring_desc,
61*5113495bSYour Name void *st_handle,
62*5113495bSYour Name hal_soc_handle_t hal_soc_hdl);
63*5113495bSYour Name void
64*5113495bSYour Name hal_reo_flush_cache_status_be(hal_ring_desc_t ring_desc,
65*5113495bSYour Name void *st_handle,
66*5113495bSYour Name hal_soc_handle_t hal_soc_hdl);
67*5113495bSYour Name void
68*5113495bSYour Name hal_reo_unblock_cache_status_be(hal_ring_desc_t ring_desc,
69*5113495bSYour Name hal_soc_handle_t hal_soc_hdl,
70*5113495bSYour Name void *st_handle);
71*5113495bSYour Name void hal_reo_flush_timeout_list_status_be(hal_ring_desc_t ring_desc,
72*5113495bSYour Name void *st_handle,
73*5113495bSYour Name hal_soc_handle_t hal_soc_hdl);
74*5113495bSYour Name void hal_reo_desc_thres_reached_status_be(hal_ring_desc_t ring_desc,
75*5113495bSYour Name void *st_handle,
76*5113495bSYour Name hal_soc_handle_t hal_soc_hdl);
77*5113495bSYour Name void
78*5113495bSYour Name hal_reo_rx_update_queue_status_be(hal_ring_desc_t ring_desc,
79*5113495bSYour Name void *st_handle,
80*5113495bSYour Name hal_soc_handle_t hal_soc_hdl);
81*5113495bSYour Name
82*5113495bSYour Name /**
83*5113495bSYour Name * hal_reo_init_cmd_ring_be() - Initialize descriptors of REO command SRNG
84*5113495bSYour Name * with command number
85*5113495bSYour Name * @hal_soc_hdl: Handle to HAL SoC structure
86*5113495bSYour Name * @hal_ring_hdl: Handle to HAL SRNG structure
87*5113495bSYour Name *
88*5113495bSYour Name * Return: none
89*5113495bSYour Name */
90*5113495bSYour Name void hal_reo_init_cmd_ring_be(hal_soc_handle_t hal_soc_hdl,
91*5113495bSYour Name hal_ring_handle_t hal_ring_hdl);
92*5113495bSYour Name uint8_t hal_get_tlv_hdr_size_be(void);
93*5113495bSYour Name #endif /* _HAL_REO_BE_H_ */
94