1*5113495bSYour Name /*
2*5113495bSYour Name * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3*5113495bSYour Name * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name *
5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for
6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the
7*5113495bSYour Name * above copyright notice and this permission notice appear in all
8*5113495bSYour Name * copies.
9*5113495bSYour Name *
10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE.
18*5113495bSYour Name */
19*5113495bSYour Name
20*5113495bSYour Name #ifndef _HAL_KIWI_RX_H_
21*5113495bSYour Name #define _HAL_KIWI_RX_H_
22*5113495bSYour Name #include "qdf_util.h"
23*5113495bSYour Name #include "qdf_types.h"
24*5113495bSYour Name #include "qdf_lock.h"
25*5113495bSYour Name #include "qdf_mem.h"
26*5113495bSYour Name #include "qdf_nbuf.h"
27*5113495bSYour Name #include "tcl_data_cmd.h"
28*5113495bSYour Name //#include "mac_tcl_reg_seq_hwioreg.h"
29*5113495bSYour Name #include "phyrx_rssi_legacy.h"
30*5113495bSYour Name #include "rx_msdu_start.h"
31*5113495bSYour Name #include "tlv_tag_def.h"
32*5113495bSYour Name #include "hal_hw_headers.h"
33*5113495bSYour Name #include "hal_internal.h"
34*5113495bSYour Name #include "cdp_txrx_mon_struct.h"
35*5113495bSYour Name #include "qdf_trace.h"
36*5113495bSYour Name #include "hal_rx.h"
37*5113495bSYour Name #include "hal_tx.h"
38*5113495bSYour Name #include "dp_types.h"
39*5113495bSYour Name #include "hal_api_mon.h"
40*5113495bSYour Name #include "phyrx_other_receive_info_ru_details.h"
41*5113495bSYour Name
42*5113495bSYour Name #define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
43*5113495bSYour Name (uint8_t *)(link_desc_va) + \
44*5113495bSYour Name RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET
45*5113495bSYour Name
46*5113495bSYour Name #define HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0) \
47*5113495bSYour Name (uint8_t *)(msdu0) + \
48*5113495bSYour Name RX_MSDU_DETAILS_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET
49*5113495bSYour Name
50*5113495bSYour Name #define HAL_ENT_MPDU_DESC_INFO(ent_ring_desc) \
51*5113495bSYour Name (uint8_t *)(ent_ring_desc) + \
52*5113495bSYour Name RX_MPDU_DETAILS_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET
53*5113495bSYour Name
54*5113495bSYour Name #define HAL_DST_MPDU_DESC_INFO(dst_ring_desc) \
55*5113495bSYour Name (uint8_t *)(dst_ring_desc) + \
56*5113495bSYour Name REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET
57*5113495bSYour Name
58*5113495bSYour Name #define HAL_RX_GET_MAC_ADDR1_VALID(rx_mpdu_start) \
59*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD1_VALID)
60*5113495bSYour Name
61*5113495bSYour Name #define HAL_RX_GET_SW_FRAME_GROUP_ID(rx_mpdu_start) \
62*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, SW_FRAME_GROUP_ID)
63*5113495bSYour Name
64*5113495bSYour Name #define HAL_RX_GET_SW_PEER_ID(rx_mpdu_start) \
65*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, SW_PEER_ID)
66*5113495bSYour Name
67*5113495bSYour Name #define HAL_REO_R0_CONFIG(soc, reg_val, reo_params) \
68*5113495bSYour Name do { \
69*5113495bSYour Name reg_val &= \
70*5113495bSYour Name ~(HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK |\
71*5113495bSYour Name HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK); \
72*5113495bSYour Name reg_val |= \
73*5113495bSYour Name HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
74*5113495bSYour Name AGING_LIST_ENABLE, 1) |\
75*5113495bSYour Name HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
76*5113495bSYour Name AGING_FLUSH_ENABLE, 1);\
77*5113495bSYour Name HAL_REG_WRITE((soc), \
78*5113495bSYour Name HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
79*5113495bSYour Name REO_REG_REG_BASE), \
80*5113495bSYour Name (reg_val)); \
81*5113495bSYour Name reg_val = \
82*5113495bSYour Name HAL_REG_READ((soc), \
83*5113495bSYour Name HWIO_REO_R0_MISC_CTL_ADDR( \
84*5113495bSYour Name REO_REG_REG_BASE)); \
85*5113495bSYour Name reg_val &= \
86*5113495bSYour Name ~(HWIO_REO_R0_MISC_CTL_FRAGMENT_DEST_RING_BMSK); \
87*5113495bSYour Name reg_val |= \
88*5113495bSYour Name HAL_SM(HWIO_REO_R0_MISC_CTL, \
89*5113495bSYour Name FRAGMENT_DEST_RING, \
90*5113495bSYour Name (reo_params)->frag_dst_ring); \
91*5113495bSYour Name reg_val &= \
92*5113495bSYour Name (~HWIO_REO_R0_MISC_CTL_BAR_DEST_RING_BMSK |\
93*5113495bSYour Name (REO_REMAP_TCL << HWIO_REO_R0_MISC_CTL_BAR_DEST_RING_SHFT)); \
94*5113495bSYour Name HAL_REG_WRITE((soc), \
95*5113495bSYour Name HWIO_REO_R0_MISC_CTL_ADDR( \
96*5113495bSYour Name REO_REG_REG_BASE), \
97*5113495bSYour Name (reg_val)); \
98*5113495bSYour Name } while (0)
99*5113495bSYour Name
100*5113495bSYour Name #define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
101*5113495bSYour Name ((struct rx_msdu_desc_info *) \
102*5113495bSYour Name _OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
103*5113495bSYour Name RX_MSDU_DETAILS_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
104*5113495bSYour Name
105*5113495bSYour Name #define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc) \
106*5113495bSYour Name ((struct rx_msdu_details *) \
107*5113495bSYour Name _OFFSET_TO_BYTE_PTR((link_desc),\
108*5113495bSYour Name RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET))
109*5113495bSYour Name
110*5113495bSYour Name #if defined(QCA_WIFI_KIWI) && defined(WLAN_CFR_ENABLE) && \
111*5113495bSYour Name defined(WLAN_ENH_CFR_ENABLE)
112*5113495bSYour Name
113*5113495bSYour Name #define PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS_CHAN_CAPTURE_STATUS_BMASK 0x00000006
114*5113495bSYour Name #define PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS_CHAN_CAPTURE_STATUS_LSB 1
115*5113495bSYour Name #define PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS_CHAN_CAPTURE_STATUS_MSB 2
116*5113495bSYour Name
117*5113495bSYour Name #define HAL_GET_RX_LOCATION_INFO_CHAN_CAPTURE_STATUS(rx_tlv) \
118*5113495bSYour Name ((HAL_RX_GET_64((rx_tlv), \
119*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS, \
120*5113495bSYour Name RTT_CFR_STATUS) & \
121*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS_CHAN_CAPTURE_STATUS_BMASK) >> \
122*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS_CHAN_CAPTURE_STATUS_LSB)
123*5113495bSYour Name
124*5113495bSYour Name static inline
hal_rx_get_bb_info_kiwi(void * rx_tlv,void * ppdu_info_hdl)125*5113495bSYour Name void hal_rx_get_bb_info_kiwi(void *rx_tlv,
126*5113495bSYour Name void *ppdu_info_hdl)
127*5113495bSYour Name {
128*5113495bSYour Name struct hal_rx_ppdu_info *ppdu_info = ppdu_info_hdl;
129*5113495bSYour Name
130*5113495bSYour Name ppdu_info->cfr_info.bb_captured_channel =
131*5113495bSYour Name HAL_RX_GET_64(rx_tlv, RXPCU_PPDU_END_INFO, BB_CAPTURED_CHANNEL);
132*5113495bSYour Name
133*5113495bSYour Name ppdu_info->cfr_info.bb_captured_timeout =
134*5113495bSYour Name HAL_RX_GET_64(rx_tlv, RXPCU_PPDU_END_INFO, BB_CAPTURED_TIMEOUT);
135*5113495bSYour Name
136*5113495bSYour Name ppdu_info->cfr_info.bb_captured_reason =
137*5113495bSYour Name HAL_RX_GET_64(rx_tlv, RXPCU_PPDU_END_INFO, BB_CAPTURED_REASON);
138*5113495bSYour Name }
139*5113495bSYour Name
140*5113495bSYour Name static inline
hal_rx_get_rtt_info_kiwi(void * rx_tlv,void * ppdu_info_hdl)141*5113495bSYour Name void hal_rx_get_rtt_info_kiwi(void *rx_tlv,
142*5113495bSYour Name void *ppdu_info_hdl)
143*5113495bSYour Name {
144*5113495bSYour Name struct hal_rx_ppdu_info *ppdu_info = ppdu_info_hdl;
145*5113495bSYour Name
146*5113495bSYour Name ppdu_info->cfr_info.rx_location_info_valid =
147*5113495bSYour Name HAL_RX_GET_64(rx_tlv, PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
148*5113495bSYour Name RX_LOCATION_INFO_VALID);
149*5113495bSYour Name
150*5113495bSYour Name ppdu_info->cfr_info.rtt_che_buffer_pointer_low32 =
151*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
152*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
153*5113495bSYour Name RTT_CHE_BUFFER_POINTER_LOW32);
154*5113495bSYour Name
155*5113495bSYour Name ppdu_info->cfr_info.rtt_che_buffer_pointer_high8 =
156*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
157*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
158*5113495bSYour Name RTT_CHE_BUFFER_POINTER_HIGH8);
159*5113495bSYour Name
160*5113495bSYour Name ppdu_info->cfr_info.chan_capture_status =
161*5113495bSYour Name HAL_GET_RX_LOCATION_INFO_CHAN_CAPTURE_STATUS(rx_tlv);
162*5113495bSYour Name
163*5113495bSYour Name ppdu_info->cfr_info.rx_start_ts =
164*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
165*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
166*5113495bSYour Name RX_START_TS);
167*5113495bSYour Name
168*5113495bSYour Name ppdu_info->cfr_info.rtt_cfo_measurement = (int16_t)
169*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
170*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
171*5113495bSYour Name RTT_CFO_MEASUREMENT);
172*5113495bSYour Name
173*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info0 =
174*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
175*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
176*5113495bSYour Name GAIN_CHAIN0);
177*5113495bSYour Name
178*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info0 |=
179*5113495bSYour Name (((uint32_t)HAL_RX_GET_64(rx_tlv,
180*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
181*5113495bSYour Name GAIN_CHAIN1)) << 16);
182*5113495bSYour Name
183*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info1 =
184*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
185*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
186*5113495bSYour Name GAIN_CHAIN2);
187*5113495bSYour Name
188*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info1 |=
189*5113495bSYour Name (((uint32_t)HAL_RX_GET_64(rx_tlv,
190*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
191*5113495bSYour Name GAIN_CHAIN3)) << 16);
192*5113495bSYour Name
193*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info2 = 0;
194*5113495bSYour Name
195*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info3 = 0;
196*5113495bSYour Name
197*5113495bSYour Name ppdu_info->cfr_info.mcs_rate =
198*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
199*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
200*5113495bSYour Name RTT_MCS_RATE);
201*5113495bSYour Name
202*5113495bSYour Name ppdu_info->cfr_info.gi_type =
203*5113495bSYour Name HAL_RX_GET_64(rx_tlv,
204*5113495bSYour Name PHYRX_LOCATION_RX_LOCATION_INFO_DETAILS,
205*5113495bSYour Name RTT_GI_TYPE);
206*5113495bSYour Name }
207*5113495bSYour Name #endif
208*5113495bSYour Name #endif
209