xref: /wlan-driver/qca-wifi-host-cmn/hal/wifi3.0/li/hal_li_generic_api.c (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name  *
5*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for
6*5113495bSYour Name  * any purpose with or without fee is hereby granted, provided that the
7*5113495bSYour Name  * above copyright notice and this permission notice appear in all
8*5113495bSYour Name  * copies.
9*5113495bSYour Name  *
10*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*5113495bSYour Name  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*5113495bSYour Name  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13*5113495bSYour Name  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14*5113495bSYour Name  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15*5113495bSYour Name  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16*5113495bSYour Name  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17*5113495bSYour Name  * PERFORMANCE OF THIS SOFTWARE.
18*5113495bSYour Name  */
19*5113495bSYour Name 
20*5113495bSYour Name #include "hal_li_api.h"
21*5113495bSYour Name #include "hal_li_hw_headers.h"
22*5113495bSYour Name #include "hal_li_reo.h"
23*5113495bSYour Name 
24*5113495bSYour Name #include "hal_rx.h"
25*5113495bSYour Name #include "hal_li_rx.h"
26*5113495bSYour Name #include "hal_tx.h"
27*5113495bSYour Name #include <hal_api_mon.h>
28*5113495bSYour Name 
hal_get_rx_max_ba_window_li(int tid)29*5113495bSYour Name static uint16_t hal_get_rx_max_ba_window_li(int tid)
30*5113495bSYour Name {
31*5113495bSYour Name 	return HAL_RX_BA_WINDOW_256;
32*5113495bSYour Name }
33*5113495bSYour Name 
hal_get_reo_qdesc_size_li(uint32_t ba_window_size,int tid)34*5113495bSYour Name static uint32_t hal_get_reo_qdesc_size_li(uint32_t ba_window_size, int tid)
35*5113495bSYour Name {
36*5113495bSYour Name 	/* Hardcode the ba_window_size to HAL_RX_MAX_BA_WINDOW for
37*5113495bSYour Name 	 * NON_QOS_TID until HW issues are resolved.
38*5113495bSYour Name 	 */
39*5113495bSYour Name 	if (tid != HAL_NON_QOS_TID)
40*5113495bSYour Name 		ba_window_size = hal_get_rx_max_ba_window_li(tid);
41*5113495bSYour Name 
42*5113495bSYour Name 	/* Return descriptor size corresponding to window size of 2 since
43*5113495bSYour Name 	 * we set ba_window_size to 2 while setting up REO descriptors as
44*5113495bSYour Name 	 * a WAR to get 2k jump exception aggregates are received without
45*5113495bSYour Name 	 * a BA session.
46*5113495bSYour Name 	 */
47*5113495bSYour Name 	if (ba_window_size <= 1) {
48*5113495bSYour Name 		if (tid != HAL_NON_QOS_TID)
49*5113495bSYour Name 			return sizeof(struct rx_reo_queue) +
50*5113495bSYour Name 				sizeof(struct rx_reo_queue_ext);
51*5113495bSYour Name 		else
52*5113495bSYour Name 			return sizeof(struct rx_reo_queue);
53*5113495bSYour Name 	}
54*5113495bSYour Name 
55*5113495bSYour Name 	if (ba_window_size <= 105)
56*5113495bSYour Name 		return sizeof(struct rx_reo_queue) +
57*5113495bSYour Name 			sizeof(struct rx_reo_queue_ext);
58*5113495bSYour Name 
59*5113495bSYour Name 	if (ba_window_size <= 210)
60*5113495bSYour Name 		return sizeof(struct rx_reo_queue) +
61*5113495bSYour Name 			(2 * sizeof(struct rx_reo_queue_ext));
62*5113495bSYour Name 
63*5113495bSYour Name 	return sizeof(struct rx_reo_queue) +
64*5113495bSYour Name 		(3 * sizeof(struct rx_reo_queue_ext));
65*5113495bSYour Name }
66*5113495bSYour Name 
hal_set_link_desc_addr_li(void * desc,uint32_t cookie,qdf_dma_addr_t link_desc_paddr,uint8_t bm_id)67*5113495bSYour Name void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
68*5113495bSYour Name 			       qdf_dma_addr_t link_desc_paddr,
69*5113495bSYour Name 			       uint8_t bm_id)
70*5113495bSYour Name {
71*5113495bSYour Name 	uint32_t *buf_addr = (uint32_t *)desc;
72*5113495bSYour Name 
73*5113495bSYour Name 	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_0, BUFFER_ADDR_31_0,
74*5113495bSYour Name 			   link_desc_paddr & 0xffffffff);
75*5113495bSYour Name 	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
76*5113495bSYour Name 			   (uint64_t)link_desc_paddr >> 32);
77*5113495bSYour Name 	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, RETURN_BUFFER_MANAGER,
78*5113495bSYour Name 			   bm_id);
79*5113495bSYour Name 	HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
80*5113495bSYour Name 			   cookie);
81*5113495bSYour Name }
82*5113495bSYour Name 
hal_tx_init_data_ring_li(hal_soc_handle_t hal_soc_hdl,hal_ring_handle_t hal_ring_hdl)83*5113495bSYour Name void hal_tx_init_data_ring_li(hal_soc_handle_t hal_soc_hdl,
84*5113495bSYour Name 			      hal_ring_handle_t hal_ring_hdl)
85*5113495bSYour Name {
86*5113495bSYour Name 	uint8_t *desc_addr;
87*5113495bSYour Name 	struct hal_srng_params srng_params;
88*5113495bSYour Name 	uint32_t desc_size;
89*5113495bSYour Name 	uint32_t num_desc;
90*5113495bSYour Name 
91*5113495bSYour Name 	hal_get_srng_params(hal_soc_hdl, hal_ring_hdl, &srng_params);
92*5113495bSYour Name 
93*5113495bSYour Name 	desc_addr = (uint8_t *)srng_params.ring_base_vaddr;
94*5113495bSYour Name 	desc_size = sizeof(struct tcl_data_cmd);
95*5113495bSYour Name 	num_desc = srng_params.num_entries;
96*5113495bSYour Name 
97*5113495bSYour Name 	while (num_desc) {
98*5113495bSYour Name 		HAL_TX_DESC_SET_TLV_HDR(desc_addr, HAL_TX_TCL_DATA_TAG,
99*5113495bSYour Name 					desc_size);
100*5113495bSYour Name 		desc_addr += (desc_size + sizeof(struct tlv_32_hdr));
101*5113495bSYour Name 		num_desc--;
102*5113495bSYour Name 	}
103*5113495bSYour Name }
104*5113495bSYour Name 
105*5113495bSYour Name /**
106*5113495bSYour Name  * hal_rx_msdu_is_wlan_mcast_generic_li(): Check if the buffer is for multicast
107*5113495bSYour Name  *					address
108*5113495bSYour Name  * @nbuf: Network buffer
109*5113495bSYour Name  *
110*5113495bSYour Name  * Returns: flag to indicate whether the nbuf has MC/BC address
111*5113495bSYour Name  */
hal_rx_msdu_is_wlan_mcast_generic_li(qdf_nbuf_t nbuf)112*5113495bSYour Name static uint32_t hal_rx_msdu_is_wlan_mcast_generic_li(qdf_nbuf_t nbuf)
113*5113495bSYour Name {
114*5113495bSYour Name 	uint8_t *buf = qdf_nbuf_data(nbuf);
115*5113495bSYour Name 
116*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
117*5113495bSYour Name 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
118*5113495bSYour Name 
119*5113495bSYour Name 	return rx_attn->mcast_bcast;
120*5113495bSYour Name }
121*5113495bSYour Name 
122*5113495bSYour Name /**
123*5113495bSYour Name  * hal_rx_tlv_decap_format_get_li() - Get packet decap format from the TLV
124*5113495bSYour Name  * @hw_desc_addr: rx tlv desc
125*5113495bSYour Name  *
126*5113495bSYour Name  * Return: pkt decap format
127*5113495bSYour Name  */
hal_rx_tlv_decap_format_get_li(void * hw_desc_addr)128*5113495bSYour Name static uint32_t hal_rx_tlv_decap_format_get_li(void *hw_desc_addr)
129*5113495bSYour Name {
130*5113495bSYour Name 	struct rx_msdu_start *rx_msdu_start;
131*5113495bSYour Name 	struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
132*5113495bSYour Name 
133*5113495bSYour Name 	rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
134*5113495bSYour Name 
135*5113495bSYour Name 	return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
136*5113495bSYour Name }
137*5113495bSYour Name 
138*5113495bSYour Name /**
139*5113495bSYour Name  * hal_rx_dump_pkt_tlvs_li(): API to print all member elements of
140*5113495bSYour Name  *			 RX TLVs
141*5113495bSYour Name  * @hal_soc_hdl: hal_soc handle
142*5113495bSYour Name  * @buf: pointer the pkt buffer.
143*5113495bSYour Name  * @dbg_level: log level.
144*5113495bSYour Name  *
145*5113495bSYour Name  * Return: void
146*5113495bSYour Name  */
hal_rx_dump_pkt_tlvs_li(hal_soc_handle_t hal_soc_hdl,uint8_t * buf,uint8_t dbg_level)147*5113495bSYour Name static void hal_rx_dump_pkt_tlvs_li(hal_soc_handle_t hal_soc_hdl,
148*5113495bSYour Name 				uint8_t *buf, uint8_t dbg_level)
149*5113495bSYour Name {
150*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
151*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
152*5113495bSYour Name 
153*5113495bSYour Name 	hal_rx_dump_msdu_end_tlv(hal_soc, pkt_tlvs, dbg_level);
154*5113495bSYour Name 	hal_rx_dump_rx_attention_tlv(hal_soc, pkt_tlvs, dbg_level);
155*5113495bSYour Name 	hal_rx_dump_msdu_start_tlv(hal_soc, pkt_tlvs, dbg_level);
156*5113495bSYour Name 	hal_rx_dump_mpdu_start_tlv(hal_soc, pkt_tlvs, dbg_level);
157*5113495bSYour Name 	hal_rx_dump_mpdu_end_tlv(hal_soc, pkt_tlvs, dbg_level);
158*5113495bSYour Name 	hal_rx_dump_pkt_hdr_tlv(hal_soc, pkt_tlvs, dbg_level);
159*5113495bSYour Name }
160*5113495bSYour Name 
161*5113495bSYour Name /**
162*5113495bSYour Name  * hal_rx_tlv_get_offload_info_li() - Get the offload info from TLV
163*5113495bSYour Name  * @rx_tlv: RX tlv start address in buffer
164*5113495bSYour Name  * @offload_info: Buffer to store the offload info
165*5113495bSYour Name  *
166*5113495bSYour Name  * Return: 0 on success, -EINVAL on failure.
167*5113495bSYour Name  */
168*5113495bSYour Name static int
hal_rx_tlv_get_offload_info_li(uint8_t * rx_tlv,struct hal_offload_info * offload_info)169*5113495bSYour Name hal_rx_tlv_get_offload_info_li(uint8_t *rx_tlv,
170*5113495bSYour Name 			       struct hal_offload_info *offload_info)
171*5113495bSYour Name {
172*5113495bSYour Name 	offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
173*5113495bSYour Name 	offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_tlv);
174*5113495bSYour Name 	offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
175*5113495bSYour Name 	offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
176*5113495bSYour Name 
177*5113495bSYour Name 	if (offload_info->tcp_proto) {
178*5113495bSYour Name 		offload_info->tcp_pure_ack =
179*5113495bSYour Name 					HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
180*5113495bSYour Name 		offload_info->tcp_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
181*5113495bSYour Name 		offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
182*5113495bSYour Name 		offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
183*5113495bSYour Name 		offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
184*5113495bSYour Name 	}
185*5113495bSYour Name 	return 0;
186*5113495bSYour Name }
187*5113495bSYour Name 
188*5113495bSYour Name /**
189*5113495bSYour Name  * hal_rx_attn_phy_ppdu_id_get_li(): get phy_ppdu_id value
190*5113495bSYour Name  * from rx attention
191*5113495bSYour Name  * @buf: pointer to rx_pkt_tlvs
192*5113495bSYour Name  *
193*5113495bSYour Name  * Return: phy_ppdu_id
194*5113495bSYour Name  */
hal_rx_attn_phy_ppdu_id_get_li(uint8_t * buf)195*5113495bSYour Name static uint16_t hal_rx_attn_phy_ppdu_id_get_li(uint8_t *buf)
196*5113495bSYour Name {
197*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
198*5113495bSYour Name 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
199*5113495bSYour Name 	uint16_t phy_ppdu_id;
200*5113495bSYour Name 
201*5113495bSYour Name 	phy_ppdu_id = HAL_RX_ATTN_PHY_PPDU_ID_GET(rx_attn);
202*5113495bSYour Name 
203*5113495bSYour Name 	return phy_ppdu_id;
204*5113495bSYour Name }
205*5113495bSYour Name 
206*5113495bSYour Name /**
207*5113495bSYour Name  * hal_rx_msdu_start_msdu_len_get_li(): API to get the MSDU length
208*5113495bSYour Name  * from rx_msdu_start TLV
209*5113495bSYour Name  *
210*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV headers
211*5113495bSYour Name  *
212*5113495bSYour Name  * Return: msdu length
213*5113495bSYour Name  */
hal_rx_msdu_start_msdu_len_get_li(uint8_t * buf)214*5113495bSYour Name static uint32_t hal_rx_msdu_start_msdu_len_get_li(uint8_t *buf)
215*5113495bSYour Name {
216*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
217*5113495bSYour Name 	struct rx_msdu_start *msdu_start =
218*5113495bSYour Name 			&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
219*5113495bSYour Name 	uint32_t msdu_len;
220*5113495bSYour Name 
221*5113495bSYour Name 	msdu_len = HAL_RX_MSDU_START_MSDU_LEN_GET(msdu_start);
222*5113495bSYour Name 
223*5113495bSYour Name 	return msdu_len;
224*5113495bSYour Name }
225*5113495bSYour Name 
226*5113495bSYour Name /**
227*5113495bSYour Name  * hal_rx_get_proto_params_li() - Get l4 proto values from TLV
228*5113495bSYour Name  * @buf: rx tlv address
229*5113495bSYour Name  * @proto_params: Buffer to store proto parameters
230*5113495bSYour Name  *
231*5113495bSYour Name  * Return: 0 on success.
232*5113495bSYour Name  */
hal_rx_get_proto_params_li(uint8_t * buf,void * proto_params)233*5113495bSYour Name static int hal_rx_get_proto_params_li(uint8_t *buf, void *proto_params)
234*5113495bSYour Name {
235*5113495bSYour Name 	struct hal_proto_params *param =
236*5113495bSYour Name 				(struct hal_proto_params *)proto_params;
237*5113495bSYour Name 
238*5113495bSYour Name 	param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(buf);
239*5113495bSYour Name 	param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(buf);
240*5113495bSYour Name 	param->ipv6_proto = HAL_RX_TLV_GET_IPV6(buf);
241*5113495bSYour Name 
242*5113495bSYour Name 	return 0;
243*5113495bSYour Name }
244*5113495bSYour Name 
245*5113495bSYour Name /**
246*5113495bSYour Name  * hal_rx_get_l3_l4_offsets_li() - Get l3/l4 header offset from TLV
247*5113495bSYour Name  * @buf: rx tlv start address
248*5113495bSYour Name  * @l3_hdr_offset: buffer to store l3 offset
249*5113495bSYour Name  * @l4_hdr_offset: buffer to store l4 offset
250*5113495bSYour Name  *
251*5113495bSYour Name  * Return: 0 on success.
252*5113495bSYour Name  */
hal_rx_get_l3_l4_offsets_li(uint8_t * buf,uint32_t * l3_hdr_offset,uint32_t * l4_hdr_offset)253*5113495bSYour Name static int hal_rx_get_l3_l4_offsets_li(uint8_t *buf, uint32_t *l3_hdr_offset,
254*5113495bSYour Name 				       uint32_t *l4_hdr_offset)
255*5113495bSYour Name {
256*5113495bSYour Name 	*l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(buf);
257*5113495bSYour Name 	*l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(buf);
258*5113495bSYour Name 
259*5113495bSYour Name 	return 0;
260*5113495bSYour Name }
261*5113495bSYour Name 
262*5113495bSYour Name #ifdef NO_RX_PKT_HDR_TLV
263*5113495bSYour Name /**
264*5113495bSYour Name  * hal_rx_pkt_hdr_get_li() - Get rx packet header start address.
265*5113495bSYour Name  * @buf: packet start address
266*5113495bSYour Name  *
267*5113495bSYour Name  * Return: packet data start address.
268*5113495bSYour Name  */
hal_rx_pkt_hdr_get_li(uint8_t * buf)269*5113495bSYour Name static inline uint8_t *hal_rx_pkt_hdr_get_li(uint8_t *buf)
270*5113495bSYour Name {
271*5113495bSYour Name 	return buf + RX_PKT_TLVS_LEN;
272*5113495bSYour Name }
273*5113495bSYour Name #else
hal_rx_pkt_hdr_get_li(uint8_t * buf)274*5113495bSYour Name static inline uint8_t *hal_rx_pkt_hdr_get_li(uint8_t *buf)
275*5113495bSYour Name {
276*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
277*5113495bSYour Name 
278*5113495bSYour Name 	return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr;
279*5113495bSYour Name }
280*5113495bSYour Name #endif
281*5113495bSYour Name 
282*5113495bSYour Name /**
283*5113495bSYour Name  * hal_rx_priv_info_set_in_tlv_li(): Save the private info to
284*5113495bSYour Name  *				the reserved bytes of rx_tlv_hdr
285*5113495bSYour Name  * @buf: start of rx_tlv_hdr
286*5113495bSYour Name  * @priv_data: hal_wbm_err_desc_info structure
287*5113495bSYour Name  * @len: length of the private data
288*5113495bSYour Name  * Return: void
289*5113495bSYour Name  */
290*5113495bSYour Name static inline void
hal_rx_priv_info_set_in_tlv_li(uint8_t * buf,uint8_t * priv_data,uint32_t len)291*5113495bSYour Name hal_rx_priv_info_set_in_tlv_li(uint8_t *buf, uint8_t *priv_data,
292*5113495bSYour Name 			       uint32_t len)
293*5113495bSYour Name {
294*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
295*5113495bSYour Name 	uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
296*5113495bSYour Name 			    RX_PADDING0_BYTES : len;
297*5113495bSYour Name 
298*5113495bSYour Name 	qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len);
299*5113495bSYour Name }
300*5113495bSYour Name 
301*5113495bSYour Name /**
302*5113495bSYour Name  * hal_rx_priv_info_get_from_tlv_li(): retrieve the private data from
303*5113495bSYour Name  *				the reserved bytes of rx_tlv_hdr.
304*5113495bSYour Name  * @buf: start of rx_tlv_hdr
305*5113495bSYour Name  * @priv_data: hal_wbm_err_desc_info structure
306*5113495bSYour Name  * @len: length of the private data
307*5113495bSYour Name  * Return: void
308*5113495bSYour Name  */
309*5113495bSYour Name static inline void
hal_rx_priv_info_get_from_tlv_li(uint8_t * buf,uint8_t * priv_data,uint32_t len)310*5113495bSYour Name hal_rx_priv_info_get_from_tlv_li(uint8_t *buf, uint8_t *priv_data,
311*5113495bSYour Name 			       uint32_t len)
312*5113495bSYour Name {
313*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
314*5113495bSYour Name 	uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
315*5113495bSYour Name 			    RX_PADDING0_BYTES : len;
316*5113495bSYour Name 
317*5113495bSYour Name 	qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len);
318*5113495bSYour Name }
319*5113495bSYour Name 
320*5113495bSYour Name /**
321*5113495bSYour Name  * hal_rx_get_tlv_size_generic_li() - Get rx packet tlv size
322*5113495bSYour Name  * @rx_pkt_tlv_size: TLV size for regular RX packets
323*5113495bSYour Name  * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
324*5113495bSYour Name  *
325*5113495bSYour Name  * Return: size of rx pkt tlv before the actual data
326*5113495bSYour Name  */
hal_rx_get_tlv_size_generic_li(uint16_t * rx_pkt_tlv_size,uint16_t * rx_mon_pkt_tlv_size)327*5113495bSYour Name static void hal_rx_get_tlv_size_generic_li(uint16_t *rx_pkt_tlv_size,
328*5113495bSYour Name 					   uint16_t *rx_mon_pkt_tlv_size)
329*5113495bSYour Name {
330*5113495bSYour Name 	*rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
331*5113495bSYour Name 	*rx_mon_pkt_tlv_size = SIZE_OF_MONITOR_TLV;
332*5113495bSYour Name }
333*5113495bSYour Name 
334*5113495bSYour Name /**
335*5113495bSYour Name  * hal_rx_wbm_err_src_get_li() - Get WBM error source from descriptor
336*5113495bSYour Name  * @ring_desc: ring descriptor
337*5113495bSYour Name  *
338*5113495bSYour Name  * Return: wbm error source
339*5113495bSYour Name  */
hal_rx_wbm_err_src_get_li(hal_ring_desc_t ring_desc)340*5113495bSYour Name uint32_t hal_rx_wbm_err_src_get_li(hal_ring_desc_t ring_desc)
341*5113495bSYour Name {
342*5113495bSYour Name 	return HAL_WBM2SW_RELEASE_SRC_GET(ring_desc);
343*5113495bSYour Name }
344*5113495bSYour Name 
345*5113495bSYour Name /**
346*5113495bSYour Name  * hal_rx_ret_buf_manager_get_li() - Get return buffer manager from ring desc
347*5113495bSYour Name  * @ring_desc: ring descriptor
348*5113495bSYour Name  *
349*5113495bSYour Name  * Return: rbm
350*5113495bSYour Name  */
hal_rx_ret_buf_manager_get_li(hal_ring_desc_t ring_desc)351*5113495bSYour Name uint8_t hal_rx_ret_buf_manager_get_li(hal_ring_desc_t ring_desc)
352*5113495bSYour Name {
353*5113495bSYour Name 	/*
354*5113495bSYour Name 	 * The following macro takes buf_addr_info as argument,
355*5113495bSYour Name 	 * but since buf_addr_info is the first field in ring_desc
356*5113495bSYour Name 	 * Hence the following call is OK
357*5113495bSYour Name 	 */
358*5113495bSYour Name 	return HAL_RX_BUF_RBM_GET(ring_desc);
359*5113495bSYour Name }
360*5113495bSYour Name 
361*5113495bSYour Name /**
362*5113495bSYour Name  * hal_rx_reo_buf_paddr_get_li() - Gets the physical address and
363*5113495bSYour Name  * cookie from the REO destination ring element
364*5113495bSYour Name  *
365*5113495bSYour Name  * @rx_desc: Opaque cookie pointer used by HAL to get to
366*5113495bSYour Name  * the current descriptor
367*5113495bSYour Name  * @buf_info: structure to return the buffer information
368*5113495bSYour Name  *
369*5113495bSYour Name  * Return: void
370*5113495bSYour Name  */
hal_rx_reo_buf_paddr_get_li(hal_ring_desc_t rx_desc,struct hal_buf_info * buf_info)371*5113495bSYour Name static void hal_rx_reo_buf_paddr_get_li(hal_ring_desc_t rx_desc,
372*5113495bSYour Name 					struct hal_buf_info *buf_info)
373*5113495bSYour Name {
374*5113495bSYour Name 	struct reo_destination_ring *reo_ring =
375*5113495bSYour Name 		 (struct reo_destination_ring *)rx_desc;
376*5113495bSYour Name 
377*5113495bSYour Name 	buf_info->paddr =
378*5113495bSYour Name 	 (HAL_RX_REO_BUFFER_ADDR_31_0_GET(reo_ring) |
379*5113495bSYour Name 	  ((uint64_t)(HAL_RX_REO_BUFFER_ADDR_39_32_GET(reo_ring)) << 32));
380*5113495bSYour Name 	buf_info->sw_cookie = HAL_RX_REO_BUF_COOKIE_GET(reo_ring);
381*5113495bSYour Name }
382*5113495bSYour Name 
383*5113495bSYour Name /**
384*5113495bSYour Name  * hal_rx_msdu_link_desc_set_li() - Retrieves MSDU Link Descriptor to WBM
385*5113495bSYour Name  *
386*5113495bSYour Name  * @hal_soc_hdl: HAL version of the SOC pointer
387*5113495bSYour Name  * @src_srng_desc: void pointer to the WBM Release Ring descriptor
388*5113495bSYour Name  * @buf_addr_info: void pointer to the buffer_addr_info
389*5113495bSYour Name  * @bm_action: put in IDLE list or release to MSDU_LIST
390*5113495bSYour Name  *
391*5113495bSYour Name  * Return: void
392*5113495bSYour Name  */
393*5113495bSYour Name /* look at implementation at dp_hw_link_desc_pool_setup()*/
hal_rx_msdu_link_desc_set_li(hal_soc_handle_t hal_soc_hdl,void * src_srng_desc,hal_buff_addrinfo_t buf_addr_info,uint8_t bm_action)394*5113495bSYour Name static void hal_rx_msdu_link_desc_set_li(hal_soc_handle_t hal_soc_hdl,
395*5113495bSYour Name 					 void *src_srng_desc,
396*5113495bSYour Name 					 hal_buff_addrinfo_t buf_addr_info,
397*5113495bSYour Name 					 uint8_t bm_action)
398*5113495bSYour Name {
399*5113495bSYour Name 	/*
400*5113495bSYour Name 	 * The offsets for fields used in this function are same in
401*5113495bSYour Name 	 * wbm_release_ring for Lithium and wbm_release_ring_tx
402*5113495bSYour Name 	 * for Beryllium. hence we can use wbm_release_ring directly.
403*5113495bSYour Name 	 */
404*5113495bSYour Name 	struct wbm_release_ring *wbm_rel_srng =
405*5113495bSYour Name 			(struct wbm_release_ring *)src_srng_desc;
406*5113495bSYour Name 	uint32_t addr_31_0;
407*5113495bSYour Name 	uint8_t addr_39_32;
408*5113495bSYour Name 
409*5113495bSYour Name 	/* Structure copy !!! */
410*5113495bSYour Name 	wbm_rel_srng->released_buff_or_desc_addr_info =
411*5113495bSYour Name 			*(struct buffer_addr_info *)buf_addr_info;
412*5113495bSYour Name 
413*5113495bSYour Name 	addr_31_0 =
414*5113495bSYour Name 	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_31_0;
415*5113495bSYour Name 	addr_39_32 =
416*5113495bSYour Name 	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_39_32;
417*5113495bSYour Name 
418*5113495bSYour Name 	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
419*5113495bSYour Name 			   RELEASE_SOURCE_MODULE, HAL_RX_WBM_ERR_SRC_SW);
420*5113495bSYour Name 	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING, BM_ACTION,
421*5113495bSYour Name 			   bm_action);
422*5113495bSYour Name 	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
423*5113495bSYour Name 			   BUFFER_OR_DESC_TYPE,
424*5113495bSYour Name 			   HAL_RX_WBM_BUF_TYPE_MSDU_LINK_DESC);
425*5113495bSYour Name 
426*5113495bSYour Name 	/* WBM error is indicated when any of the link descriptors given to
427*5113495bSYour Name 	 * WBM has a NULL address, and one those paths is the link descriptors
428*5113495bSYour Name 	 * released from host after processing RXDMA errors,
429*5113495bSYour Name 	 * or from Rx defrag path, and we want to add an assert here to ensure
430*5113495bSYour Name 	 * host is not releasing descriptors with NULL address.
431*5113495bSYour Name 	 */
432*5113495bSYour Name 
433*5113495bSYour Name 	if (qdf_unlikely(!addr_31_0 && !addr_39_32)) {
434*5113495bSYour Name 		hal_dump_wbm_rel_desc(src_srng_desc);
435*5113495bSYour Name 		qdf_assert_always(0);
436*5113495bSYour Name 	}
437*5113495bSYour Name }
438*5113495bSYour Name 
439*5113495bSYour Name static
hal_rx_buf_cookie_rbm_get_li(uint32_t * buf_addr_info_hdl,hal_buf_info_t buf_info_hdl)440*5113495bSYour Name void hal_rx_buf_cookie_rbm_get_li(uint32_t *buf_addr_info_hdl,
441*5113495bSYour Name 				  hal_buf_info_t buf_info_hdl)
442*5113495bSYour Name {
443*5113495bSYour Name 	struct hal_buf_info *buf_info =
444*5113495bSYour Name 		(struct hal_buf_info *)buf_info_hdl;
445*5113495bSYour Name 	struct buffer_addr_info *buf_addr_info =
446*5113495bSYour Name 		(struct buffer_addr_info *)buf_addr_info_hdl;
447*5113495bSYour Name 
448*5113495bSYour Name 	buf_info->sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info);
449*5113495bSYour Name 	/*
450*5113495bSYour Name 	 * buffer addr info is the first member of ring desc, so the typecast
451*5113495bSYour Name 	 * can be done.
452*5113495bSYour Name 	 */
453*5113495bSYour Name 	buf_info->rbm = hal_rx_ret_buf_manager_get_li
454*5113495bSYour Name 				((hal_ring_desc_t)buf_addr_info);
455*5113495bSYour Name }
456*5113495bSYour Name 
457*5113495bSYour Name /**
458*5113495bSYour Name  * hal_rx_msdu_list_get_li(): API to get the MSDU information
459*5113495bSYour Name  * from the MSDU link descriptor
460*5113495bSYour Name  *
461*5113495bSYour Name  * @hal_soc_hdl: HAL version of the SOC pointer
462*5113495bSYour Name  * @msdu_link_desc: Opaque pointer used by HAL to get to the
463*5113495bSYour Name  * MSDU link descriptor (struct rx_msdu_link)
464*5113495bSYour Name  *
465*5113495bSYour Name  * @hal_msdu_list: Return the list of MSDUs contained in this link descriptor
466*5113495bSYour Name  *
467*5113495bSYour Name  * @num_msdus: Number of MSDUs in the MPDU
468*5113495bSYour Name  *
469*5113495bSYour Name  * Return: void
470*5113495bSYour Name  */
hal_rx_msdu_list_get_li(hal_soc_handle_t hal_soc_hdl,void * msdu_link_desc,void * hal_msdu_list,uint16_t * num_msdus)471*5113495bSYour Name static inline void hal_rx_msdu_list_get_li(hal_soc_handle_t hal_soc_hdl,
472*5113495bSYour Name 					   void *msdu_link_desc,
473*5113495bSYour Name 					   void *hal_msdu_list,
474*5113495bSYour Name 					   uint16_t *num_msdus)
475*5113495bSYour Name {
476*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
477*5113495bSYour Name 	struct rx_msdu_details *msdu_details;
478*5113495bSYour Name 	struct rx_msdu_desc_info *msdu_desc_info;
479*5113495bSYour Name 	struct hal_rx_msdu_list *msdu_list = hal_msdu_list;
480*5113495bSYour Name 	struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc;
481*5113495bSYour Name 	int i;
482*5113495bSYour Name 	struct hal_buf_info buf_info;
483*5113495bSYour Name 
484*5113495bSYour Name 	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);
485*5113495bSYour Name 
486*5113495bSYour Name 	hal_debug("msdu_link=%pK msdu_details=%pK", msdu_link, msdu_details);
487*5113495bSYour Name 	for (i = 0; i < HAL_RX_NUM_MSDU_DESC; i++) {
488*5113495bSYour Name 		/* num_msdus received in mpdu descriptor may be incorrect
489*5113495bSYour Name 		 * sometimes due to HW issue. Check msdu buffer address also
490*5113495bSYour Name 		 */
491*5113495bSYour Name 		if (!i && (HAL_RX_BUFFER_ADDR_31_0_GET(
492*5113495bSYour Name 			&msdu_details[i].buffer_addr_info_details) == 0))
493*5113495bSYour Name 			break;
494*5113495bSYour Name 		if (HAL_RX_BUFFER_ADDR_31_0_GET(
495*5113495bSYour Name 			&msdu_details[i].buffer_addr_info_details) == 0) {
496*5113495bSYour Name 			/* set the last msdu bit in the prev msdu_desc_info */
497*5113495bSYour Name 			msdu_desc_info =
498*5113495bSYour Name 				hal_rx_msdu_desc_info_get_ptr
499*5113495bSYour Name 					(&msdu_details[i - 1], hal_soc);
500*5113495bSYour Name 			HAL_RX_LAST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1);
501*5113495bSYour Name 			break;
502*5113495bSYour Name 		}
503*5113495bSYour Name 		msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[i],
504*5113495bSYour Name 							       hal_soc);
505*5113495bSYour Name 
506*5113495bSYour Name 		/* set first MSDU bit or the last MSDU bit */
507*5113495bSYour Name 		if (!i)
508*5113495bSYour Name 			HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1);
509*5113495bSYour Name 		else if (i == (HAL_RX_NUM_MSDU_DESC - 1))
510*5113495bSYour Name 			HAL_RX_LAST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1);
511*5113495bSYour Name 
512*5113495bSYour Name 		msdu_list->msdu_info[i].msdu_flags =
513*5113495bSYour Name 			 hal_rx_msdu_flags_get(hal_soc_hdl, msdu_desc_info);
514*5113495bSYour Name 		msdu_list->msdu_info[i].msdu_len =
515*5113495bSYour Name 			 HAL_RX_MSDU_PKT_LENGTH_GET(msdu_desc_info);
516*5113495bSYour Name 
517*5113495bSYour Name 		/* addr field in buf_info will not be valid */
518*5113495bSYour Name 		hal_rx_buf_cookie_rbm_get_li(
519*5113495bSYour Name 				(uint32_t *)
520*5113495bSYour Name 				&msdu_details[i].buffer_addr_info_details,
521*5113495bSYour Name 				&buf_info);
522*5113495bSYour Name 		msdu_list->sw_cookie[i] = buf_info.sw_cookie;
523*5113495bSYour Name 		msdu_list->rbm[i] = buf_info.rbm;
524*5113495bSYour Name 		msdu_list->paddr[i] = HAL_RX_BUFFER_ADDR_31_0_GET(
525*5113495bSYour Name 			   &msdu_details[i].buffer_addr_info_details) |
526*5113495bSYour Name 			   (uint64_t)HAL_RX_BUFFER_ADDR_39_32_GET(
527*5113495bSYour Name 			   &msdu_details[i].buffer_addr_info_details) << 32;
528*5113495bSYour Name 		hal_debug("i=%d sw_cookie=%d", i, msdu_list->sw_cookie[i]);
529*5113495bSYour Name 	}
530*5113495bSYour Name 	*num_msdus = i;
531*5113495bSYour Name }
532*5113495bSYour Name 
533*5113495bSYour Name /*
534*5113495bSYour Name  * hal_rxdma_buff_addr_info_set() - set the buffer_addr_info of the
535*5113495bSYour Name  *				    rxdma ring entry.
536*5113495bSYour Name  * @rxdma_entry: descriptor entry
537*5113495bSYour Name  * @paddr: physical address of nbuf data pointer.
538*5113495bSYour Name  * @cookie: SW cookie used as a index to SW rx desc.
539*5113495bSYour Name  * @manager: who owns the nbuf (host, NSS, etc...).
540*5113495bSYour Name  *
541*5113495bSYour Name  */
hal_rxdma_buff_addr_info_set_li(void * rxdma_entry,qdf_dma_addr_t paddr,uint32_t cookie,uint8_t manager)542*5113495bSYour Name static void hal_rxdma_buff_addr_info_set_li(void *rxdma_entry,
543*5113495bSYour Name 			qdf_dma_addr_t paddr, uint32_t cookie, uint8_t manager)
544*5113495bSYour Name {
545*5113495bSYour Name 	uint32_t paddr_lo = ((u64)paddr & 0x00000000ffffffff);
546*5113495bSYour Name 	uint32_t paddr_hi = ((u64)paddr & 0xffffffff00000000) >> 32;
547*5113495bSYour Name 
548*5113495bSYour Name 	HAL_RXDMA_PADDR_LO_SET(rxdma_entry, paddr_lo);
549*5113495bSYour Name 	HAL_RXDMA_PADDR_HI_SET(rxdma_entry, paddr_hi);
550*5113495bSYour Name 	HAL_RXDMA_COOKIE_SET(rxdma_entry, cookie);
551*5113495bSYour Name 	HAL_RXDMA_MANAGER_SET(rxdma_entry, manager);
552*5113495bSYour Name }
553*5113495bSYour Name 
554*5113495bSYour Name /**
555*5113495bSYour Name  * hal_rx_get_reo_error_code_li() - Get REO error code from ring desc
556*5113495bSYour Name  * @rx_desc: rx descriptor
557*5113495bSYour Name  *
558*5113495bSYour Name  * Return: REO error code
559*5113495bSYour Name  */
hal_rx_get_reo_error_code_li(hal_ring_desc_t rx_desc)560*5113495bSYour Name static uint32_t hal_rx_get_reo_error_code_li(hal_ring_desc_t rx_desc)
561*5113495bSYour Name {
562*5113495bSYour Name 	struct reo_destination_ring *reo_desc =
563*5113495bSYour Name 			(struct reo_destination_ring *)rx_desc;
564*5113495bSYour Name 
565*5113495bSYour Name 	return HAL_RX_REO_ERROR_GET(reo_desc);
566*5113495bSYour Name }
567*5113495bSYour Name 
568*5113495bSYour Name /**
569*5113495bSYour Name  * hal_gen_reo_remap_val_generic_li() - Generate the reo map value
570*5113495bSYour Name  * @remap_reg: remap register
571*5113495bSYour Name  * @ix0_map: mapping values for reo
572*5113495bSYour Name  *
573*5113495bSYour Name  * Return: IX0 reo remap register value to be written
574*5113495bSYour Name  */
575*5113495bSYour Name static uint32_t
hal_gen_reo_remap_val_generic_li(enum hal_reo_remap_reg remap_reg,uint8_t * ix0_map)576*5113495bSYour Name hal_gen_reo_remap_val_generic_li(enum hal_reo_remap_reg remap_reg,
577*5113495bSYour Name 				 uint8_t *ix0_map)
578*5113495bSYour Name {
579*5113495bSYour Name 	uint32_t ix_val = 0;
580*5113495bSYour Name 
581*5113495bSYour Name 	switch (remap_reg) {
582*5113495bSYour Name 	case HAL_REO_REMAP_REG_IX0:
583*5113495bSYour Name 		ix_val = HAL_REO_REMAP_IX0(ix0_map[0], 0) |
584*5113495bSYour Name 			HAL_REO_REMAP_IX0(ix0_map[1], 1) |
585*5113495bSYour Name 			HAL_REO_REMAP_IX0(ix0_map[2], 2) |
586*5113495bSYour Name 			HAL_REO_REMAP_IX0(ix0_map[3], 3) |
587*5113495bSYour Name 			HAL_REO_REMAP_IX0(ix0_map[4], 4) |
588*5113495bSYour Name 			HAL_REO_REMAP_IX0(ix0_map[5], 5) |
589*5113495bSYour Name 			HAL_REO_REMAP_IX0(ix0_map[6], 6) |
590*5113495bSYour Name 			HAL_REO_REMAP_IX0(ix0_map[7], 7);
591*5113495bSYour Name 		break;
592*5113495bSYour Name 	case HAL_REO_REMAP_REG_IX2:
593*5113495bSYour Name 		ix_val = HAL_REO_REMAP_IX2(ix0_map[0], 16) |
594*5113495bSYour Name 			HAL_REO_REMAP_IX2(ix0_map[1], 17) |
595*5113495bSYour Name 			HAL_REO_REMAP_IX2(ix0_map[2], 18) |
596*5113495bSYour Name 			HAL_REO_REMAP_IX2(ix0_map[3], 19) |
597*5113495bSYour Name 			HAL_REO_REMAP_IX2(ix0_map[4], 20) |
598*5113495bSYour Name 			HAL_REO_REMAP_IX2(ix0_map[5], 21) |
599*5113495bSYour Name 			HAL_REO_REMAP_IX2(ix0_map[6], 22) |
600*5113495bSYour Name 			HAL_REO_REMAP_IX2(ix0_map[7], 23);
601*5113495bSYour Name 		break;
602*5113495bSYour Name 	default:
603*5113495bSYour Name 		break;
604*5113495bSYour Name 	}
605*5113495bSYour Name 
606*5113495bSYour Name 	return ix_val;
607*5113495bSYour Name }
608*5113495bSYour Name 
609*5113495bSYour Name /**
610*5113495bSYour Name  * hal_rx_tlv_csum_err_get_li() - Get IP and tcp-udp checksum fail flag
611*5113495bSYour Name  * @rx_tlv_hdr: start address of rx_tlv_hdr
612*5113495bSYour Name  * @ip_csum_err: buffer to return ip_csum_fail flag
613*5113495bSYour Name  * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag
614*5113495bSYour Name  *
615*5113495bSYour Name  * Return: None
616*5113495bSYour Name  */
617*5113495bSYour Name static inline void
hal_rx_tlv_csum_err_get_li(uint8_t * rx_tlv_hdr,uint32_t * ip_csum_err,uint32_t * tcp_udp_csum_err)618*5113495bSYour Name hal_rx_tlv_csum_err_get_li(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err,
619*5113495bSYour Name 			   uint32_t *tcp_udp_csum_err)
620*5113495bSYour Name {
621*5113495bSYour Name 	*ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
622*5113495bSYour Name 	*tcp_udp_csum_err = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
623*5113495bSYour Name }
624*5113495bSYour Name 
hal_rx_err_status_get_li(hal_ring_desc_t rx_desc)625*5113495bSYour Name static uint8_t hal_rx_err_status_get_li(hal_ring_desc_t rx_desc)
626*5113495bSYour Name {
627*5113495bSYour Name 	return HAL_RX_ERROR_STATUS_GET(rx_desc);
628*5113495bSYour Name }
629*5113495bSYour Name 
hal_rx_reo_buf_type_get_li(hal_ring_desc_t rx_desc)630*5113495bSYour Name static uint8_t hal_rx_reo_buf_type_get_li(hal_ring_desc_t rx_desc)
631*5113495bSYour Name {
632*5113495bSYour Name 	return HAL_RX_REO_BUF_TYPE_GET(rx_desc);
633*5113495bSYour Name }
634*5113495bSYour Name 
635*5113495bSYour Name static
hal_rx_tlv_mpdu_len_err_get_li(void * hw_desc_addr)636*5113495bSYour Name uint32_t hal_rx_tlv_mpdu_len_err_get_li(void *hw_desc_addr)
637*5113495bSYour Name {
638*5113495bSYour Name 	struct rx_attention *rx_attn;
639*5113495bSYour Name 	struct rx_mon_pkt_tlvs *rx_desc =
640*5113495bSYour Name 		(struct rx_mon_pkt_tlvs *)hw_desc_addr;
641*5113495bSYour Name 
642*5113495bSYour Name 	rx_attn = &rx_desc->attn_tlv.rx_attn;
643*5113495bSYour Name 
644*5113495bSYour Name 	return HAL_RX_GET(rx_attn, RX_ATTENTION_1, MPDU_LENGTH_ERR);
645*5113495bSYour Name }
646*5113495bSYour Name 
647*5113495bSYour Name static
hal_rx_tlv_mpdu_fcs_err_get_li(void * hw_desc_addr)648*5113495bSYour Name uint32_t hal_rx_tlv_mpdu_fcs_err_get_li(void *hw_desc_addr)
649*5113495bSYour Name {
650*5113495bSYour Name 	struct rx_attention *rx_attn;
651*5113495bSYour Name 	struct rx_mon_pkt_tlvs *rx_desc =
652*5113495bSYour Name 		(struct rx_mon_pkt_tlvs *)hw_desc_addr;
653*5113495bSYour Name 
654*5113495bSYour Name 	rx_attn = &rx_desc->attn_tlv.rx_attn;
655*5113495bSYour Name 
656*5113495bSYour Name 	return HAL_RX_GET(rx_attn, RX_ATTENTION_1, FCS_ERR);
657*5113495bSYour Name }
658*5113495bSYour Name 
659*5113495bSYour Name #ifdef NO_RX_PKT_HDR_TLV
hal_rx_desc_get_80211_hdr_li(void * hw_desc_addr)660*5113495bSYour Name static uint8_t *hal_rx_desc_get_80211_hdr_li(void *hw_desc_addr)
661*5113495bSYour Name {
662*5113495bSYour Name 	uint8_t *rx_pkt_hdr;
663*5113495bSYour Name 	struct rx_mon_pkt_tlvs *rx_desc =
664*5113495bSYour Name 		(struct rx_mon_pkt_tlvs *)hw_desc_addr;
665*5113495bSYour Name 
666*5113495bSYour Name 	rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
667*5113495bSYour Name 
668*5113495bSYour Name 	return rx_pkt_hdr;
669*5113495bSYour Name }
670*5113495bSYour Name #else
hal_rx_desc_get_80211_hdr_li(void * hw_desc_addr)671*5113495bSYour Name static uint8_t *hal_rx_desc_get_80211_hdr_li(void *hw_desc_addr)
672*5113495bSYour Name {
673*5113495bSYour Name 	uint8_t *rx_pkt_hdr;
674*5113495bSYour Name 
675*5113495bSYour Name 	struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
676*5113495bSYour Name 
677*5113495bSYour Name 	rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
678*5113495bSYour Name 
679*5113495bSYour Name 	return rx_pkt_hdr;
680*5113495bSYour Name }
681*5113495bSYour Name #endif
682*5113495bSYour Name 
hal_rx_hw_desc_mpdu_user_id_li(void * hw_desc_addr)683*5113495bSYour Name static uint32_t hal_rx_hw_desc_mpdu_user_id_li(void *hw_desc_addr)
684*5113495bSYour Name {
685*5113495bSYour Name 	struct rx_mon_pkt_tlvs *rx_desc =
686*5113495bSYour Name 		(struct rx_mon_pkt_tlvs *)hw_desc_addr;
687*5113495bSYour Name 	uint32_t user_id;
688*5113495bSYour Name 
689*5113495bSYour Name 	user_id = HAL_RX_GET_USER_TLV32_USERID(
690*5113495bSYour Name 		&rx_desc->mpdu_start_tlv);
691*5113495bSYour Name 
692*5113495bSYour Name 	return user_id;
693*5113495bSYour Name }
694*5113495bSYour Name 
695*5113495bSYour Name /**
696*5113495bSYour Name  * hal_rx_msdu_start_msdu_len_set_li(): API to set the MSDU length
697*5113495bSYour Name  * from rx_msdu_start TLV
698*5113495bSYour Name  *
699*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV headers
700*5113495bSYour Name  * @len: msdu length
701*5113495bSYour Name  *
702*5113495bSYour Name  * Return: none
703*5113495bSYour Name  */
704*5113495bSYour Name static inline void
hal_rx_msdu_start_msdu_len_set_li(uint8_t * buf,uint32_t len)705*5113495bSYour Name hal_rx_msdu_start_msdu_len_set_li(uint8_t *buf, uint32_t len)
706*5113495bSYour Name {
707*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
708*5113495bSYour Name 	struct rx_msdu_start *msdu_start =
709*5113495bSYour Name 			&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
710*5113495bSYour Name 	void *wrd1;
711*5113495bSYour Name 
712*5113495bSYour Name 	wrd1 = (uint8_t *)msdu_start + RX_MSDU_START_1_MSDU_LENGTH_OFFSET;
713*5113495bSYour Name 	*(uint32_t *)wrd1 &= (~RX_MSDU_START_1_MSDU_LENGTH_MASK);
714*5113495bSYour Name 	*(uint32_t *)wrd1 |= len;
715*5113495bSYour Name }
716*5113495bSYour Name 
717*5113495bSYour Name /*
718*5113495bSYour Name  * hal_rx_tlv_bw_get_li(): API to get the Bandwidth
719*5113495bSYour Name  * Interval from rx_msdu_start
720*5113495bSYour Name  *
721*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV header
722*5113495bSYour Name  * Return: uint32_t(bw)
723*5113495bSYour Name  */
hal_rx_tlv_bw_get_li(uint8_t * buf)724*5113495bSYour Name static inline uint32_t hal_rx_tlv_bw_get_li(uint8_t *buf)
725*5113495bSYour Name {
726*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
727*5113495bSYour Name 	struct rx_msdu_start *msdu_start =
728*5113495bSYour Name 		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
729*5113495bSYour Name 	uint32_t bw;
730*5113495bSYour Name 
731*5113495bSYour Name 	bw = HAL_RX_MSDU_START_BW_GET(msdu_start);
732*5113495bSYour Name 
733*5113495bSYour Name 	return bw;
734*5113495bSYour Name }
735*5113495bSYour Name 
736*5113495bSYour Name /*
737*5113495bSYour Name  * hal_rx_tlv_get_freq_li(): API to get the frequency of operating channel
738*5113495bSYour Name  * from rx_msdu_start
739*5113495bSYour Name  *
740*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV header
741*5113495bSYour Name  * Return: uint32_t(frequency)
742*5113495bSYour Name  */
743*5113495bSYour Name static inline uint32_t
hal_rx_tlv_get_freq_li(uint8_t * buf)744*5113495bSYour Name hal_rx_tlv_get_freq_li(uint8_t *buf)
745*5113495bSYour Name {
746*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
747*5113495bSYour Name 	struct rx_msdu_start *msdu_start =
748*5113495bSYour Name 		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
749*5113495bSYour Name 	uint32_t freq;
750*5113495bSYour Name 
751*5113495bSYour Name 	freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
752*5113495bSYour Name 
753*5113495bSYour Name 	return freq;
754*5113495bSYour Name }
755*5113495bSYour Name 
756*5113495bSYour Name /**
757*5113495bSYour Name  * hal_rx_tlv_sgi_get_li(): API to get the Short Guard
758*5113495bSYour Name  * Interval from rx_msdu_start TLV
759*5113495bSYour Name  *
760*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV headers
761*5113495bSYour Name  * Return: uint32_t(sgi)
762*5113495bSYour Name  */
763*5113495bSYour Name static inline uint32_t
hal_rx_tlv_sgi_get_li(uint8_t * buf)764*5113495bSYour Name hal_rx_tlv_sgi_get_li(uint8_t *buf)
765*5113495bSYour Name {
766*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
767*5113495bSYour Name 	struct rx_msdu_start *msdu_start =
768*5113495bSYour Name 		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
769*5113495bSYour Name 	uint32_t sgi;
770*5113495bSYour Name 
771*5113495bSYour Name 	sgi = HAL_RX_MSDU_START_SGI_GET(msdu_start);
772*5113495bSYour Name 
773*5113495bSYour Name 	return sgi;
774*5113495bSYour Name }
775*5113495bSYour Name 
776*5113495bSYour Name /**
777*5113495bSYour Name  * hal_rx_tlv_rate_mcs_get_li(): API to get the MCS rate
778*5113495bSYour Name  * from rx_msdu_start TLV
779*5113495bSYour Name  *
780*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV headers
781*5113495bSYour Name  * Return: uint32_t(rate_mcs)
782*5113495bSYour Name  */
783*5113495bSYour Name static inline uint32_t
hal_rx_tlv_rate_mcs_get_li(uint8_t * buf)784*5113495bSYour Name hal_rx_tlv_rate_mcs_get_li(uint8_t *buf)
785*5113495bSYour Name {
786*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
787*5113495bSYour Name 	struct rx_msdu_start *msdu_start =
788*5113495bSYour Name 		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
789*5113495bSYour Name 	uint32_t rate_mcs;
790*5113495bSYour Name 
791*5113495bSYour Name 	rate_mcs = HAL_RX_MSDU_START_RATE_MCS_GET(msdu_start);
792*5113495bSYour Name 
793*5113495bSYour Name 	return rate_mcs;
794*5113495bSYour Name }
795*5113495bSYour Name 
796*5113495bSYour Name /*
797*5113495bSYour Name  * hal_rx_tlv_get_pkt_type_li(): API to get the pkt type
798*5113495bSYour Name  * from rx_msdu_start
799*5113495bSYour Name  *
800*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV header
801*5113495bSYour Name  * Return: uint32_t(pkt type)
802*5113495bSYour Name  */
803*5113495bSYour Name 
hal_rx_tlv_get_pkt_type_li(uint8_t * buf)804*5113495bSYour Name static inline uint32_t hal_rx_tlv_get_pkt_type_li(uint8_t *buf)
805*5113495bSYour Name {
806*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
807*5113495bSYour Name 	struct rx_msdu_start *msdu_start =
808*5113495bSYour Name 		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
809*5113495bSYour Name 	uint32_t pkt_type;
810*5113495bSYour Name 
811*5113495bSYour Name 	pkt_type = HAL_RX_MSDU_START_PKT_TYPE_GET(msdu_start);
812*5113495bSYour Name 
813*5113495bSYour Name 	return pkt_type;
814*5113495bSYour Name }
815*5113495bSYour Name 
816*5113495bSYour Name /*
817*5113495bSYour Name  * hal_rx_tlv_first_mpdu_get_li(): get fist_mpdu bit from rx attention
818*5113495bSYour Name  * @buf: pointer to rx_pkt_tlvs
819*5113495bSYour Name  *
820*5113495bSYour Name  * reutm: uint32_t(first_msdu)
821*5113495bSYour Name  */
822*5113495bSYour Name static inline uint32_t
hal_rx_tlv_first_mpdu_get_li(uint8_t * buf)823*5113495bSYour Name hal_rx_tlv_first_mpdu_get_li(uint8_t *buf)
824*5113495bSYour Name {
825*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
826*5113495bSYour Name 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
827*5113495bSYour Name 	uint32_t first_mpdu;
828*5113495bSYour Name 
829*5113495bSYour Name 	first_mpdu = HAL_RX_ATTN_FIRST_MPDU_GET(rx_attn);
830*5113495bSYour Name 
831*5113495bSYour Name 	return first_mpdu;
832*5113495bSYour Name }
833*5113495bSYour Name 
834*5113495bSYour Name /**
835*5113495bSYour Name  * hal_rx_phy_legacy_get_rssi_li() - API to get RSSI from TLV
836*5113495bSYour Name  *                                   WIFIPHYRX_RSSI_LEGACY_E
837*5113495bSYour Name  * @buf: pointer to the start of WIFIPHYRX_RSSI_LEGACY_E TLV
838*5113495bSYour Name  *
839*5113495bSYour Name  * Return: value of RSSI
840*5113495bSYour Name  */
hal_rx_phy_legacy_get_rssi_li(uint8_t * buf)841*5113495bSYour Name static inline int8_t hal_rx_phy_legacy_get_rssi_li(uint8_t *buf)
842*5113495bSYour Name {
843*5113495bSYour Name 	return HAL_RX_GET(buf, PHYRX_RSSI_LEGACY_35, RSSI_COMB);
844*5113495bSYour Name }
845*5113495bSYour Name 
846*5113495bSYour Name /*
847*5113495bSYour Name  * hal_rx_msdu_get_keyid_li(): API to get the key id if the decrypted packet
848*5113495bSYour Name  * from rx_msdu_end
849*5113495bSYour Name  *
850*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV header
851*5113495bSYour Name  * Return: uint32_t(key id)
852*5113495bSYour Name  */
853*5113495bSYour Name static inline uint8_t
hal_rx_msdu_get_keyid_li(uint8_t * buf)854*5113495bSYour Name hal_rx_msdu_get_keyid_li(uint8_t *buf)
855*5113495bSYour Name {
856*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
857*5113495bSYour Name 	struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
858*5113495bSYour Name 	uint32_t keyid_octet;
859*5113495bSYour Name 
860*5113495bSYour Name 	keyid_octet = HAL_RX_MSDU_END_KEYID_OCTET_GET(msdu_end);
861*5113495bSYour Name 
862*5113495bSYour Name 	return keyid_octet & 0x3;
863*5113495bSYour Name }
864*5113495bSYour Name 
865*5113495bSYour Name /*
866*5113495bSYour Name  * hal_rx_tlv_get_is_decrypted_li(): API to get the decrypt status of the
867*5113495bSYour Name  *  packet from rx_attention
868*5113495bSYour Name  *
869*5113495bSYour Name  * @buf: pointer to the start of RX PKT TLV header
870*5113495bSYour Name  * Return: uint32_t(decryt status)
871*5113495bSYour Name  */
872*5113495bSYour Name static inline uint32_t
hal_rx_tlv_get_is_decrypted_li(uint8_t * buf)873*5113495bSYour Name hal_rx_tlv_get_is_decrypted_li(uint8_t *buf)
874*5113495bSYour Name {
875*5113495bSYour Name 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
876*5113495bSYour Name 	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
877*5113495bSYour Name 	uint32_t is_decrypt = 0;
878*5113495bSYour Name 	uint32_t decrypt_status;
879*5113495bSYour Name 
880*5113495bSYour Name 	decrypt_status = HAL_RX_ATTN_DECRYPT_STATUS_GET(rx_attn);
881*5113495bSYour Name 
882*5113495bSYour Name 	if (!decrypt_status)
883*5113495bSYour Name 		is_decrypt = 1;
884*5113495bSYour Name 
885*5113495bSYour Name 	return is_decrypt;
886*5113495bSYour Name }
887*5113495bSYour Name 
888*5113495bSYour Name /**
889*5113495bSYour Name  * hal_rx_msdu_reo_dst_ind_get_li() - Gets the REO
890*5113495bSYour Name  * destination ring ID from the msdu desc info
891*5113495bSYour Name  *
892*5113495bSYour Name  * @hal_soc_hdl: HAL version of the SOC pointer
893*5113495bSYour Name  * @msdu_link_desc: Opaque cookie pointer used by HAL to get to
894*5113495bSYour Name  * the current descriptor
895*5113495bSYour Name  *
896*5113495bSYour Name  * Return: dst_ind (REO destination ring ID)
897*5113495bSYour Name  */
898*5113495bSYour Name static inline uint32_t
hal_rx_msdu_reo_dst_ind_get_li(hal_soc_handle_t hal_soc_hdl,void * msdu_link_desc)899*5113495bSYour Name hal_rx_msdu_reo_dst_ind_get_li(hal_soc_handle_t hal_soc_hdl,
900*5113495bSYour Name 			       void *msdu_link_desc)
901*5113495bSYour Name {
902*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
903*5113495bSYour Name 	struct rx_msdu_details *msdu_details;
904*5113495bSYour Name 	struct rx_msdu_desc_info *msdu_desc_info;
905*5113495bSYour Name 	struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc;
906*5113495bSYour Name 	uint32_t dst_ind;
907*5113495bSYour Name 
908*5113495bSYour Name 	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);
909*5113495bSYour Name 
910*5113495bSYour Name 	/* The first msdu in the link should exist */
911*5113495bSYour Name 	msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[0],
912*5113495bSYour Name 						       hal_soc);
913*5113495bSYour Name 	dst_ind = HAL_RX_MSDU_REO_DST_IND_GET(msdu_desc_info);
914*5113495bSYour Name 	return dst_ind;
915*5113495bSYour Name }
916*5113495bSYour Name 
917*5113495bSYour Name static inline void
hal_mpdu_desc_info_set_li(hal_soc_handle_t hal_soc_hdl,void * ent_desc,void * mpdu_desc,uint32_t seq_no)918*5113495bSYour Name hal_mpdu_desc_info_set_li(hal_soc_handle_t hal_soc_hdl,
919*5113495bSYour Name 			  void *ent_desc,
920*5113495bSYour Name 			  void *mpdu_desc,
921*5113495bSYour Name 			  uint32_t seq_no)
922*5113495bSYour Name {
923*5113495bSYour Name 	struct rx_mpdu_desc_info *mpdu_desc_info =
924*5113495bSYour Name 			(struct rx_mpdu_desc_info *)mpdu_desc;
925*5113495bSYour Name 
926*5113495bSYour Name 	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
927*5113495bSYour Name 				  MSDU_COUNT, 0x1);
928*5113495bSYour Name 	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
929*5113495bSYour Name 				  MPDU_SEQUENCE_NUMBER, seq_no);
930*5113495bSYour Name 	/* unset frag bit */
931*5113495bSYour Name 	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
932*5113495bSYour Name 				  FRAGMENT_FLAG, 0x0);
933*5113495bSYour Name 	/* set sa/da valid bits */
934*5113495bSYour Name 	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
935*5113495bSYour Name 				  SA_IS_VALID, 0x1);
936*5113495bSYour Name 	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
937*5113495bSYour Name 				  DA_IS_VALID, 0x1);
938*5113495bSYour Name 	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
939*5113495bSYour Name 				  RAW_MPDU, 0x0);
940*5113495bSYour Name }
941*5113495bSYour Name 
942*5113495bSYour Name static inline void
hal_msdu_desc_info_set_li(hal_soc_handle_t hal_soc_hdl,void * msdu_desc,uint32_t dst_ind,uint32_t nbuf_len)943*5113495bSYour Name hal_msdu_desc_info_set_li(hal_soc_handle_t hal_soc_hdl,
944*5113495bSYour Name 			  void *msdu_desc, uint32_t dst_ind,
945*5113495bSYour Name 			  uint32_t nbuf_len)
946*5113495bSYour Name {
947*5113495bSYour Name 	struct rx_msdu_desc_info *msdu_desc_info =
948*5113495bSYour Name 		(struct rx_msdu_desc_info *)msdu_desc;
949*5113495bSYour Name 
950*5113495bSYour Name 	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
951*5113495bSYour Name 				  FIRST_MSDU_IN_MPDU_FLAG, 1);
952*5113495bSYour Name 	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
953*5113495bSYour Name 				  LAST_MSDU_IN_MPDU_FLAG, 1);
954*5113495bSYour Name 	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
955*5113495bSYour Name 				  MSDU_CONTINUATION, 0x0);
956*5113495bSYour Name 	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
957*5113495bSYour Name 				  REO_DESTINATION_INDICATION,
958*5113495bSYour Name 				  dst_ind);
959*5113495bSYour Name 	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
960*5113495bSYour Name 				  MSDU_LENGTH, nbuf_len);
961*5113495bSYour Name 	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
962*5113495bSYour Name 				  SA_IS_VALID, 1);
963*5113495bSYour Name 	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
964*5113495bSYour Name 				  DA_IS_VALID, 1);
965*5113495bSYour Name }
966*5113495bSYour Name 
967*5113495bSYour Name static inline
hal_get_reo_ent_desc_qdesc_addr_li(uint8_t * desc)968*5113495bSYour Name uint8_t *hal_get_reo_ent_desc_qdesc_addr_li(uint8_t *desc)
969*5113495bSYour Name {
970*5113495bSYour Name 	return desc + REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
971*5113495bSYour Name }
972*5113495bSYour Name 
973*5113495bSYour Name static inline
hal_set_reo_ent_desc_reo_dest_ind_li(uint8_t * desc,uint32_t dst_ind)974*5113495bSYour Name void hal_set_reo_ent_desc_reo_dest_ind_li(uint8_t *desc, uint32_t dst_ind)
975*5113495bSYour Name {
976*5113495bSYour Name 	HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING_5,
977*5113495bSYour Name 		       REO_DESTINATION_INDICATION, dst_ind);
978*5113495bSYour Name }
979*5113495bSYour Name 
980*5113495bSYour Name static inline void
hal_rx_wbm_rel_buf_paddr_get_li(hal_ring_desc_t rx_desc,struct hal_buf_info * buf_info)981*5113495bSYour Name hal_rx_wbm_rel_buf_paddr_get_li(hal_ring_desc_t rx_desc,
982*5113495bSYour Name 				struct hal_buf_info *buf_info)
983*5113495bSYour Name {
984*5113495bSYour Name 	struct wbm_release_ring *wbm_rel_ring =
985*5113495bSYour Name 		 (struct wbm_release_ring *)rx_desc;
986*5113495bSYour Name 
987*5113495bSYour Name 	buf_info->paddr =
988*5113495bSYour Name 	 (HAL_RX_WBM_BUF_ADDR_31_0_GET(wbm_rel_ring) |
989*5113495bSYour Name 	  ((uint64_t)(HAL_RX_WBM_BUF_ADDR_39_32_GET(wbm_rel_ring)) << 32));
990*5113495bSYour Name 
991*5113495bSYour Name 	buf_info->sw_cookie = HAL_RX_WBM_BUF_COOKIE_GET(wbm_rel_ring);
992*5113495bSYour Name }
993*5113495bSYour Name 
hal_reo_status_update_li(hal_soc_handle_t hal_soc_hdl,hal_ring_desc_t reo_desc,void * st_handle,uint32_t tlv,int * num_ref)994*5113495bSYour Name static QDF_STATUS hal_reo_status_update_li(hal_soc_handle_t hal_soc_hdl,
995*5113495bSYour Name 					   hal_ring_desc_t reo_desc,
996*5113495bSYour Name 					   void *st_handle,
997*5113495bSYour Name 					   uint32_t tlv, int *num_ref)
998*5113495bSYour Name {
999*5113495bSYour Name 	union hal_reo_status *reo_status_ref;
1000*5113495bSYour Name 
1001*5113495bSYour Name 	reo_status_ref = (union hal_reo_status *)st_handle;
1002*5113495bSYour Name 
1003*5113495bSYour Name 	switch (tlv) {
1004*5113495bSYour Name 	case HAL_REO_QUEUE_STATS_STATUS_TLV:
1005*5113495bSYour Name 		hal_reo_queue_stats_status_li(reo_desc,
1006*5113495bSYour Name 					      &reo_status_ref->queue_status,
1007*5113495bSYour Name 					      hal_soc_hdl);
1008*5113495bSYour Name 		*num_ref = reo_status_ref->queue_status.header.cmd_num;
1009*5113495bSYour Name 		break;
1010*5113495bSYour Name 	case HAL_REO_FLUSH_QUEUE_STATUS_TLV:
1011*5113495bSYour Name 		hal_reo_flush_queue_status_li(reo_desc,
1012*5113495bSYour Name 					      &reo_status_ref->fl_queue_status,
1013*5113495bSYour Name 					      hal_soc_hdl);
1014*5113495bSYour Name 		*num_ref = reo_status_ref->fl_queue_status.header.cmd_num;
1015*5113495bSYour Name 		break;
1016*5113495bSYour Name 	case HAL_REO_FLUSH_CACHE_STATUS_TLV:
1017*5113495bSYour Name 		hal_reo_flush_cache_status_li(reo_desc,
1018*5113495bSYour Name 					      &reo_status_ref->fl_cache_status,
1019*5113495bSYour Name 					      hal_soc_hdl);
1020*5113495bSYour Name 		*num_ref = reo_status_ref->fl_cache_status.header.cmd_num;
1021*5113495bSYour Name 		break;
1022*5113495bSYour Name 	case HAL_REO_UNBLK_CACHE_STATUS_TLV:
1023*5113495bSYour Name 		hal_reo_unblock_cache_status_li(
1024*5113495bSYour Name 					reo_desc, hal_soc_hdl,
1025*5113495bSYour Name 					&reo_status_ref->unblk_cache_status);
1026*5113495bSYour Name 		*num_ref = reo_status_ref->unblk_cache_status.header.cmd_num;
1027*5113495bSYour Name 		break;
1028*5113495bSYour Name 	case HAL_REO_TIMOUT_LIST_STATUS_TLV:
1029*5113495bSYour Name 		hal_reo_flush_timeout_list_status_li(
1030*5113495bSYour Name 					reo_desc,
1031*5113495bSYour Name 					&reo_status_ref->fl_timeout_status,
1032*5113495bSYour Name 					hal_soc_hdl);
1033*5113495bSYour Name 		*num_ref = reo_status_ref->fl_timeout_status.header.cmd_num;
1034*5113495bSYour Name 		break;
1035*5113495bSYour Name 	case HAL_REO_DESC_THRES_STATUS_TLV:
1036*5113495bSYour Name 		hal_reo_desc_thres_reached_status_li(
1037*5113495bSYour Name 						reo_desc,
1038*5113495bSYour Name 						&reo_status_ref->thres_status,
1039*5113495bSYour Name 						hal_soc_hdl);
1040*5113495bSYour Name 		*num_ref = reo_status_ref->thres_status.header.cmd_num;
1041*5113495bSYour Name 		break;
1042*5113495bSYour Name 	case HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV:
1043*5113495bSYour Name 		hal_reo_rx_update_queue_status_li(
1044*5113495bSYour Name 					reo_desc,
1045*5113495bSYour Name 					&reo_status_ref->rx_queue_status,
1046*5113495bSYour Name 					hal_soc_hdl);
1047*5113495bSYour Name 		*num_ref = reo_status_ref->rx_queue_status.header.cmd_num;
1048*5113495bSYour Name 		break;
1049*5113495bSYour Name 	default:
1050*5113495bSYour Name 		QDF_TRACE(QDF_MODULE_ID_DP_REO, QDF_TRACE_LEVEL_WARN,
1051*5113495bSYour Name 			  "hal_soc %pK: no handler for TLV:%d",
1052*5113495bSYour Name 			   hal_soc_hdl, tlv);
1053*5113495bSYour Name 		return QDF_STATUS_E_FAILURE;
1054*5113495bSYour Name 	} /* switch */
1055*5113495bSYour Name 
1056*5113495bSYour Name 	return QDF_STATUS_SUCCESS;
1057*5113495bSYour Name }
1058*5113495bSYour Name 
1059*5113495bSYour Name /**
1060*5113495bSYour Name  * hal_get_idle_link_bm_id_li() - Get idle link BM id from chid_id
1061*5113495bSYour Name  * @chip_id: mlo chip_id
1062*5113495bSYour Name  *
1063*5113495bSYour Name  * Returns: RBM ID
1064*5113495bSYour Name  */
hal_get_idle_link_bm_id_li(uint8_t chip_id)1065*5113495bSYour Name static uint8_t hal_get_idle_link_bm_id_li(uint8_t chip_id)
1066*5113495bSYour Name {
1067*5113495bSYour Name 	return WBM_IDLE_DESC_LIST;
1068*5113495bSYour Name }
1069*5113495bSYour Name 
hal_rx_get_phy_ppdu_id_size_li(void)1070*5113495bSYour Name static inline uint8_t hal_rx_get_phy_ppdu_id_size_li(void)
1071*5113495bSYour Name {
1072*5113495bSYour Name 	return sizeof(uint32_t);
1073*5113495bSYour Name }
1074*5113495bSYour Name 
1075*5113495bSYour Name /**
1076*5113495bSYour Name  * hal_rx_parse_eht_sig_hdr_li()
1077*5113495bSYour Name  *				    - process eht sig header
1078*5113495bSYour Name  * @hal_soc: HAL soc handle
1079*5113495bSYour Name  * @tlv: pointer to EHT SIG TLV buffer
1080*5113495bSYour Name  * @ppdu_info_handle: pointer to ppdu_info
1081*5113495bSYour Name  *
1082*5113495bSYour Name  * Return: None
1083*5113495bSYour Name  */
1084*5113495bSYour Name static inline
hal_rx_parse_eht_sig_hdr_li(struct hal_soc * hal_soc,uint8_t * tlv,void * ppdu_info_handle)1085*5113495bSYour Name void hal_rx_parse_eht_sig_hdr_li(struct hal_soc *hal_soc, uint8_t *tlv,
1086*5113495bSYour Name 				 void *ppdu_info_handle)
1087*5113495bSYour Name {
1088*5113495bSYour Name }
1089*5113495bSYour Name 
hal_hw_txrx_default_ops_attach_li(struct hal_soc * hal_soc)1090*5113495bSYour Name void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
1091*5113495bSYour Name {
1092*5113495bSYour Name 	hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_li;
1093*5113495bSYour Name 	hal_soc->ops->hal_get_rx_max_ba_window =
1094*5113495bSYour Name 					hal_get_rx_max_ba_window_li;
1095*5113495bSYour Name 	hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_li;
1096*5113495bSYour Name 	hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_li;
1097*5113495bSYour Name 	hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_li;
1098*5113495bSYour Name 	hal_soc->ops->hal_set_ba_aging_timeout = hal_set_ba_aging_timeout_li;
1099*5113495bSYour Name 	hal_soc->ops->hal_get_reo_reg_base_offset =
1100*5113495bSYour Name 					hal_get_reo_reg_base_offset_li;
1101*5113495bSYour Name 	hal_soc->ops->hal_rx_get_tlv_size = hal_rx_get_tlv_size_generic_li;
1102*5113495bSYour Name 	hal_soc->ops->hal_rx_msdu_is_wlan_mcast =
1103*5113495bSYour Name 					hal_rx_msdu_is_wlan_mcast_generic_li;
1104*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_decap_format_get =
1105*5113495bSYour Name 					hal_rx_tlv_decap_format_get_li;
1106*5113495bSYour Name 	hal_soc->ops->hal_rx_dump_pkt_tlvs = hal_rx_dump_pkt_tlvs_li;
1107*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_get_offload_info =
1108*5113495bSYour Name 					hal_rx_tlv_get_offload_info_li;
1109*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_phy_ppdu_id_get =
1110*5113495bSYour Name 					hal_rx_attn_phy_ppdu_id_get_li;
1111*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_msdu_done_get = hal_rx_attn_msdu_done_get_li;
1112*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_msdu_len_get =
1113*5113495bSYour Name 					hal_rx_msdu_start_msdu_len_get_li;
1114*5113495bSYour Name 	hal_soc->ops->hal_rx_get_proto_params = hal_rx_get_proto_params_li;
1115*5113495bSYour Name 	hal_soc->ops->hal_rx_get_l3_l4_offsets = hal_rx_get_l3_l4_offsets_li;
1116*5113495bSYour Name 
1117*5113495bSYour Name 	hal_soc->ops->hal_rx_reo_buf_paddr_get = hal_rx_reo_buf_paddr_get_li;
1118*5113495bSYour Name 	hal_soc->ops->hal_rx_msdu_link_desc_set = hal_rx_msdu_link_desc_set_li;
1119*5113495bSYour Name 	hal_soc->ops->hal_rx_buf_cookie_rbm_get = hal_rx_buf_cookie_rbm_get_li;
1120*5113495bSYour Name 	hal_soc->ops->hal_rx_ret_buf_manager_get =
1121*5113495bSYour Name 						hal_rx_ret_buf_manager_get_li;
1122*5113495bSYour Name 	hal_soc->ops->hal_rxdma_buff_addr_info_set =
1123*5113495bSYour Name 					hal_rxdma_buff_addr_info_set_li;
1124*5113495bSYour Name 	hal_soc->ops->hal_rx_msdu_flags_get = hal_rx_msdu_flags_get_li;
1125*5113495bSYour Name 	hal_soc->ops->hal_rx_get_reo_error_code = hal_rx_get_reo_error_code_li;
1126*5113495bSYour Name 	hal_soc->ops->hal_gen_reo_remap_val =
1127*5113495bSYour Name 				hal_gen_reo_remap_val_generic_li;
1128*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_csum_err_get =
1129*5113495bSYour Name 					hal_rx_tlv_csum_err_get_li;
1130*5113495bSYour Name 	hal_soc->ops->hal_rx_mpdu_desc_info_get =
1131*5113495bSYour Name 					hal_rx_mpdu_desc_info_get_li;
1132*5113495bSYour Name 	hal_soc->ops->hal_rx_err_status_get = hal_rx_err_status_get_li;
1133*5113495bSYour Name 	hal_soc->ops->hal_rx_reo_buf_type_get = hal_rx_reo_buf_type_get_li;
1134*5113495bSYour Name 	hal_soc->ops->hal_rx_pkt_hdr_get = hal_rx_pkt_hdr_get_li;
1135*5113495bSYour Name 	hal_soc->ops->hal_rx_wbm_err_src_get = hal_rx_wbm_err_src_get_li;
1136*5113495bSYour Name 	hal_soc->ops->hal_rx_wbm_rel_buf_paddr_get =
1137*5113495bSYour Name 					hal_rx_wbm_rel_buf_paddr_get_li;
1138*5113495bSYour Name 	hal_soc->ops->hal_rx_priv_info_set_in_tlv =
1139*5113495bSYour Name 					hal_rx_priv_info_set_in_tlv_li;
1140*5113495bSYour Name 	hal_soc->ops->hal_rx_priv_info_get_from_tlv =
1141*5113495bSYour Name 					hal_rx_priv_info_get_from_tlv_li;
1142*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_mpdu_len_err_get =
1143*5113495bSYour Name 					hal_rx_tlv_mpdu_len_err_get_li;
1144*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_mpdu_fcs_err_get =
1145*5113495bSYour Name 					hal_rx_tlv_mpdu_fcs_err_get_li;
1146*5113495bSYour Name 	hal_soc->ops->hal_reo_send_cmd = hal_reo_send_cmd_li;
1147*5113495bSYour Name 	hal_soc->ops->hal_rx_desc_get_80211_hdr = hal_rx_desc_get_80211_hdr_li;
1148*5113495bSYour Name 	hal_soc->ops->hal_rx_hw_desc_mpdu_user_id =
1149*5113495bSYour Name 					hal_rx_hw_desc_mpdu_user_id_li;
1150*5113495bSYour Name 	hal_soc->ops->hal_reo_qdesc_setup = hal_reo_qdesc_setup_li;
1151*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_msdu_len_set =
1152*5113495bSYour Name 					hal_rx_msdu_start_msdu_len_set_li;
1153*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_bw_get = hal_rx_tlv_bw_get_li;
1154*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_get_freq = hal_rx_tlv_get_freq_li;
1155*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_sgi_get = hal_rx_tlv_sgi_get_li;
1156*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_rate_mcs_get = hal_rx_tlv_rate_mcs_get_li;
1157*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_get_pkt_type = hal_rx_tlv_get_pkt_type_li;
1158*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_first_mpdu_get = hal_rx_tlv_first_mpdu_get_li;
1159*5113495bSYour Name 	hal_soc->ops->hal_rx_tlv_get_is_decrypted =
1160*5113495bSYour Name 			hal_rx_tlv_get_is_decrypted_li;
1161*5113495bSYour Name 	hal_soc->ops->hal_rx_msdu_get_keyid = hal_rx_msdu_get_keyid_li;
1162*5113495bSYour Name 	hal_soc->ops->hal_rx_msdu_reo_dst_ind_get =
1163*5113495bSYour Name 			hal_rx_msdu_reo_dst_ind_get_li;
1164*5113495bSYour Name 	hal_soc->ops->hal_msdu_desc_info_set = hal_msdu_desc_info_set_li;
1165*5113495bSYour Name 	hal_soc->ops->hal_mpdu_desc_info_set = hal_mpdu_desc_info_set_li;
1166*5113495bSYour Name 	hal_soc->ops->hal_reo_status_update = hal_reo_status_update_li;
1167*5113495bSYour Name 	hal_soc->ops->hal_get_tlv_hdr_size = hal_get_tlv_hdr_size_li;
1168*5113495bSYour Name 	hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr =
1169*5113495bSYour Name 			hal_get_reo_ent_desc_qdesc_addr_li;
1170*5113495bSYour Name 	hal_soc->ops->hal_rx_get_qdesc_addr = hal_rx_get_qdesc_addr_li;
1171*5113495bSYour Name 	hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
1172*5113495bSYour Name 			hal_set_reo_ent_desc_reo_dest_ind_li;
1173*5113495bSYour Name 	hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_li;
1174*5113495bSYour Name 	hal_soc->ops->hal_rx_get_phy_ppdu_id_size =
1175*5113495bSYour Name 						hal_rx_get_phy_ppdu_id_size_li;
1176*5113495bSYour Name 	hal_soc->ops->hal_rx_phy_legacy_get_rssi =
1177*5113495bSYour Name 						hal_rx_phy_legacy_get_rssi_li;
1178*5113495bSYour Name 	hal_soc->ops->hal_rx_parse_eht_sig_hdr = hal_rx_parse_eht_sig_hdr_li;
1179*5113495bSYour Name }
1180