xref: /wlan-driver/qca-wifi-host-cmn/hal/wifi3.0/li/hal_li_tx.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name  *
5*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for
6*5113495bSYour Name  * any purpose with or without fee is hereby granted, provided that the
7*5113495bSYour Name  * above copyright notice and this permission notice appear in all
8*5113495bSYour Name  * copies.
9*5113495bSYour Name  *
10*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*5113495bSYour Name  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*5113495bSYour Name  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13*5113495bSYour Name  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14*5113495bSYour Name  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15*5113495bSYour Name  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16*5113495bSYour Name  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17*5113495bSYour Name  * PERFORMANCE OF THIS SOFTWARE.
18*5113495bSYour Name  */
19*5113495bSYour Name 
20*5113495bSYour Name #ifndef _HAL_LI_TX_H_
21*5113495bSYour Name #define _HAL_LI_TX_H_
22*5113495bSYour Name 
23*5113495bSYour Name enum hal_li_tx_ret_buf_manager {
24*5113495bSYour Name 	HAL_LI_WBM_SW0_BM_ID = 3,
25*5113495bSYour Name 	HAL_LI_WBM_SW1_BM_ID = 4,
26*5113495bSYour Name 	HAL_LI_WBM_SW2_BM_ID = 5,
27*5113495bSYour Name 	HAL_LI_WBM_SW3_BM_ID = 6,
28*5113495bSYour Name 	HAL_LI_WBM_SW4_BM_ID = 7,
29*5113495bSYour Name };
30*5113495bSYour Name 
31*5113495bSYour Name /*---------------------------------------------------------------------------
32*5113495bSYour Name  * Function declarations and documentation
33*5113495bSYour Name  * ---------------------------------------------------------------------------
34*5113495bSYour Name  */
35*5113495bSYour Name 
36*5113495bSYour Name /*---------------------------------------------------------------------------
37*5113495bSYour Name  * TCL Descriptor accessor APIs
38*5113495bSYour Name  * ---------------------------------------------------------------------------
39*5113495bSYour Name  */
40*5113495bSYour Name 
41*5113495bSYour Name /**
42*5113495bSYour Name  * hal_tx_desc_set_buf_addr() - Fill Buffer Address information in Tx
43*5113495bSYour Name  *                              Descriptor
44*5113495bSYour Name  * @hal_soc_hdl: hal_soc handle
45*5113495bSYour Name  * @desc: Handle to Tx Descriptor
46*5113495bSYour Name  * @paddr: Physical Address
47*5113495bSYour Name  * @pool_id: Return Buffer Manager ID
48*5113495bSYour Name  * @desc_id: Descriptor ID
49*5113495bSYour Name  * @type: 0 - Address points to a MSDU buffer
50*5113495bSYour Name  *		1 - Address points to MSDU extension descriptor
51*5113495bSYour Name  *
52*5113495bSYour Name  * Return: void
53*5113495bSYour Name  */
54*5113495bSYour Name static inline
hal_tx_desc_set_buf_addr(hal_soc_handle_t hal_soc_hdl,void * desc,dma_addr_t paddr,uint8_t pool_id,uint32_t desc_id,uint8_t type)55*5113495bSYour Name void hal_tx_desc_set_buf_addr(hal_soc_handle_t hal_soc_hdl, void *desc,
56*5113495bSYour Name 			      dma_addr_t paddr,
57*5113495bSYour Name 			      uint8_t pool_id, uint32_t desc_id,
58*5113495bSYour Name 			      uint8_t type)
59*5113495bSYour Name {
60*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
61*5113495bSYour Name 
62*5113495bSYour Name 	hal_soc->ops->hal_tx_desc_set_buf_addr(desc, paddr, pool_id,
63*5113495bSYour Name 						desc_id, type);
64*5113495bSYour Name }
65*5113495bSYour Name 
66*5113495bSYour Name /**
67*5113495bSYour Name  * hal_tx_desc_set_lmac_id_li() - Set the lmac_id value
68*5113495bSYour Name  * @hal_soc_hdl: hal_soc handle
69*5113495bSYour Name  * @desc: Handle to Tx Descriptor
70*5113495bSYour Name  * @lmac_id: mac Id to ast matching
71*5113495bSYour Name  *                     b00 – mac 0
72*5113495bSYour Name  *                     b01 – mac 1
73*5113495bSYour Name  *                     b10 – mac 2
74*5113495bSYour Name  *                     b11 – all macs (legacy HK way)
75*5113495bSYour Name  *
76*5113495bSYour Name  * Return: void
77*5113495bSYour Name  */
hal_tx_desc_set_lmac_id_li(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t lmac_id)78*5113495bSYour Name static inline void hal_tx_desc_set_lmac_id_li(hal_soc_handle_t hal_soc_hdl,
79*5113495bSYour Name 					      void *desc, uint8_t lmac_id)
80*5113495bSYour Name {
81*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
82*5113495bSYour Name 
83*5113495bSYour Name 	hal_soc->ops->hal_tx_desc_set_lmac_id(desc, lmac_id);
84*5113495bSYour Name }
85*5113495bSYour Name 
86*5113495bSYour Name /**
87*5113495bSYour Name  * hal_tx_desc_set_search_type_li() - Set the search type value
88*5113495bSYour Name  * @hal_soc_hdl: hal_soc handle
89*5113495bSYour Name  * @desc: Handle to Tx Descriptor
90*5113495bSYour Name  * @search_type: search type
91*5113495bSYour Name  *		     0 – Normal search
92*5113495bSYour Name  *		     1 – Index based address search
93*5113495bSYour Name  *		     2 – Index based flow search
94*5113495bSYour Name  *
95*5113495bSYour Name  * Return: void
96*5113495bSYour Name  */
hal_tx_desc_set_search_type_li(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t search_type)97*5113495bSYour Name static inline void hal_tx_desc_set_search_type_li(hal_soc_handle_t hal_soc_hdl,
98*5113495bSYour Name 						  void *desc,
99*5113495bSYour Name 						  uint8_t search_type)
100*5113495bSYour Name {
101*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
102*5113495bSYour Name 
103*5113495bSYour Name 	hal_soc->ops->hal_tx_desc_set_search_type(desc, search_type);
104*5113495bSYour Name }
105*5113495bSYour Name 
106*5113495bSYour Name /**
107*5113495bSYour Name  * hal_tx_desc_set_search_index_li() - Set the search index value
108*5113495bSYour Name  * @hal_soc_hdl: hal_soc handle
109*5113495bSYour Name  * @desc: Handle to Tx Descriptor
110*5113495bSYour Name  * @search_index: The index that will be used for index based address or
111*5113495bSYour Name  *                flow search. The field is valid when 'search_type' is
112*5113495bSYour Name  *                1 0r 2
113*5113495bSYour Name  *
114*5113495bSYour Name  * Return: void
115*5113495bSYour Name  */
hal_tx_desc_set_search_index_li(hal_soc_handle_t hal_soc_hdl,void * desc,uint32_t search_index)116*5113495bSYour Name static inline void hal_tx_desc_set_search_index_li(hal_soc_handle_t hal_soc_hdl,
117*5113495bSYour Name 						   void *desc,
118*5113495bSYour Name 						   uint32_t search_index)
119*5113495bSYour Name {
120*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
121*5113495bSYour Name 
122*5113495bSYour Name 	hal_soc->ops->hal_tx_desc_set_search_index(desc, search_index);
123*5113495bSYour Name }
124*5113495bSYour Name 
125*5113495bSYour Name /**
126*5113495bSYour Name  * hal_tx_desc_set_cache_set_num() - Set the cache-set-num value
127*5113495bSYour Name  * @hal_soc_hdl: hal_soc handle
128*5113495bSYour Name  * @desc: Handle to Tx Descriptor
129*5113495bSYour Name  * @cache_num: Cache set number that should be used to cache the index
130*5113495bSYour Name  *                based search results, for address and flow search.
131*5113495bSYour Name  *                This value should be equal to LSB four bits of the hash value
132*5113495bSYour Name  *                of match data, in case of search index points to an entry
133*5113495bSYour Name  *                which may be used in content based search also. The value can
134*5113495bSYour Name  *                be anything when the entry pointed by search index will not be
135*5113495bSYour Name  *                used for content based search.
136*5113495bSYour Name  *
137*5113495bSYour Name  * Return: void
138*5113495bSYour Name  */
hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t cache_num)139*5113495bSYour Name static inline void hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl,
140*5113495bSYour Name 						 void *desc,
141*5113495bSYour Name 						 uint8_t cache_num)
142*5113495bSYour Name {
143*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
144*5113495bSYour Name 
145*5113495bSYour Name 	hal_soc->ops->hal_tx_desc_set_cache_set_num(desc, cache_num);
146*5113495bSYour Name }
147*5113495bSYour Name 
148*5113495bSYour Name /**
149*5113495bSYour Name  * hal_tx_desc_set_buf_length - Set Data length in bytes in Tx Descriptor
150*5113495bSYour Name  * @desc: Handle to Tx Descriptor
151*5113495bSYour Name  * @data_length: MSDU length in case of direct descriptor.
152*5113495bSYour Name  *              Length of link extension descriptor in case of Link extension
153*5113495bSYour Name  *              descriptor.Includes the length of Metadata
154*5113495bSYour Name  * Return: None
155*5113495bSYour Name  */
hal_tx_desc_set_buf_length(void * desc,uint16_t data_length)156*5113495bSYour Name static inline void  hal_tx_desc_set_buf_length(void *desc,
157*5113495bSYour Name 					       uint16_t data_length)
158*5113495bSYour Name {
159*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_3, DATA_LENGTH) |=
160*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_3, DATA_LENGTH, data_length);
161*5113495bSYour Name }
162*5113495bSYour Name 
163*5113495bSYour Name /**
164*5113495bSYour Name  * hal_tx_desc_set_buf_offset - Sets Packet Offset field in Tx descriptor
165*5113495bSYour Name  * @desc: Handle to Tx Descriptor
166*5113495bSYour Name  * @offset: Packet offset from Metadata in case of direct buffer descriptor.
167*5113495bSYour Name  *
168*5113495bSYour Name  * Return: void
169*5113495bSYour Name  */
hal_tx_desc_set_buf_offset(void * desc,uint8_t offset)170*5113495bSYour Name static inline void hal_tx_desc_set_buf_offset(void *desc,
171*5113495bSYour Name 					      uint8_t offset)
172*5113495bSYour Name {
173*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_3, PACKET_OFFSET) |=
174*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_3, PACKET_OFFSET, offset);
175*5113495bSYour Name }
176*5113495bSYour Name 
177*5113495bSYour Name /**
178*5113495bSYour Name  * hal_tx_desc_set_encap_type - Set encapsulation type in Tx Descriptor
179*5113495bSYour Name  * @desc: Handle to Tx Descriptor
180*5113495bSYour Name  * @encap_type: Encapsulation that HW will perform
181*5113495bSYour Name  *
182*5113495bSYour Name  * Return: void
183*5113495bSYour Name  *
184*5113495bSYour Name  */
hal_tx_desc_set_encap_type(void * desc,enum hal_tx_encap_type encap_type)185*5113495bSYour Name static inline void hal_tx_desc_set_encap_type(void *desc,
186*5113495bSYour Name 					      enum hal_tx_encap_type encap_type)
187*5113495bSYour Name {
188*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_2, ENCAP_TYPE) |=
189*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_2, ENCAP_TYPE, encap_type);
190*5113495bSYour Name }
191*5113495bSYour Name 
192*5113495bSYour Name /**
193*5113495bSYour Name  * hal_tx_desc_set_encrypt_type - Sets the Encrypt Type in Tx Descriptor
194*5113495bSYour Name  * @desc: Handle to Tx Descriptor
195*5113495bSYour Name  * @type: Encrypt Type
196*5113495bSYour Name  *
197*5113495bSYour Name  * Return: void
198*5113495bSYour Name  */
hal_tx_desc_set_encrypt_type(void * desc,enum hal_tx_encrypt_type type)199*5113495bSYour Name static inline void hal_tx_desc_set_encrypt_type(void *desc,
200*5113495bSYour Name 						enum hal_tx_encrypt_type type)
201*5113495bSYour Name {
202*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_2, ENCRYPT_TYPE) |=
203*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_2, ENCRYPT_TYPE, type);
204*5113495bSYour Name }
205*5113495bSYour Name 
206*5113495bSYour Name /**
207*5113495bSYour Name  * hal_tx_desc_set_addr_search_flags - Enable AddrX and AddrY search flags
208*5113495bSYour Name  * @desc: Handle to Tx Descriptor
209*5113495bSYour Name  * @flags: Bit 0 - AddrY search enable, Bit 1 - AddrX search enable
210*5113495bSYour Name  *
211*5113495bSYour Name  * Return: void
212*5113495bSYour Name  */
hal_tx_desc_set_addr_search_flags(void * desc,uint8_t flags)213*5113495bSYour Name static inline void hal_tx_desc_set_addr_search_flags(void *desc,
214*5113495bSYour Name 						     uint8_t flags)
215*5113495bSYour Name {
216*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_2, ADDRX_EN) |=
217*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_2, ADDRX_EN, (flags & 0x1));
218*5113495bSYour Name 
219*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_2, ADDRY_EN) |=
220*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_2, ADDRY_EN, (flags >> 1));
221*5113495bSYour Name }
222*5113495bSYour Name 
223*5113495bSYour Name /**
224*5113495bSYour Name  * hal_tx_desc_set_l4_checksum_en -  Set TCP/IP checksum enable flags
225*5113495bSYour Name  * Tx Descriptor for MSDU_buffer type
226*5113495bSYour Name  * @desc: Handle to Tx Descriptor
227*5113495bSYour Name  * @en: UDP/TCP over ipv4/ipv6 checksum enable flags (5 bits)
228*5113495bSYour Name  *
229*5113495bSYour Name  * Return: void
230*5113495bSYour Name  */
hal_tx_desc_set_l4_checksum_en(void * desc,uint8_t en)231*5113495bSYour Name static inline void hal_tx_desc_set_l4_checksum_en(void *desc,
232*5113495bSYour Name 						  uint8_t en)
233*5113495bSYour Name {
234*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_3, IPV4_CHECKSUM_EN) |=
235*5113495bSYour Name 		(HAL_TX_SM(TCL_DATA_CMD_3, UDP_OVER_IPV4_CHECKSUM_EN, en) |
236*5113495bSYour Name 		 HAL_TX_SM(TCL_DATA_CMD_3, UDP_OVER_IPV6_CHECKSUM_EN, en) |
237*5113495bSYour Name 		 HAL_TX_SM(TCL_DATA_CMD_3, TCP_OVER_IPV4_CHECKSUM_EN, en) |
238*5113495bSYour Name 		 HAL_TX_SM(TCL_DATA_CMD_3, TCP_OVER_IPV6_CHECKSUM_EN, en));
239*5113495bSYour Name }
240*5113495bSYour Name 
241*5113495bSYour Name /**
242*5113495bSYour Name  * hal_tx_desc_set_l3_checksum_en() -  Set IPv4 checksum enable flag in
243*5113495bSYour Name  *                                     Tx Descriptor for MSDU_buffer type
244*5113495bSYour Name  * @desc: Handle to Tx Descriptor
245*5113495bSYour Name  * @en: ipv4 checksum enable flags
246*5113495bSYour Name  *
247*5113495bSYour Name  * Return: void
248*5113495bSYour Name  */
hal_tx_desc_set_l3_checksum_en(void * desc,uint8_t en)249*5113495bSYour Name static inline void hal_tx_desc_set_l3_checksum_en(void *desc,
250*5113495bSYour Name 						  uint8_t en)
251*5113495bSYour Name {
252*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_3, IPV4_CHECKSUM_EN) |=
253*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_3, IPV4_CHECKSUM_EN, en);
254*5113495bSYour Name }
255*5113495bSYour Name 
256*5113495bSYour Name /**
257*5113495bSYour Name  * hal_tx_desc_set_fw_metadata() - Sets the metadata that is part of
258*5113495bSYour Name  *                                 TCL descriptor
259*5113495bSYour Name  * @desc:Handle to Tx Descriptor
260*5113495bSYour Name  * @metadata: Metadata to be sent to Firmware
261*5113495bSYour Name  *
262*5113495bSYour Name  * Return: void
263*5113495bSYour Name  */
hal_tx_desc_set_fw_metadata(void * desc,uint16_t metadata)264*5113495bSYour Name static inline void hal_tx_desc_set_fw_metadata(void *desc,
265*5113495bSYour Name 					       uint16_t metadata)
266*5113495bSYour Name {
267*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_2, TCL_CMD_NUMBER) |=
268*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_2, TCL_CMD_NUMBER, metadata);
269*5113495bSYour Name }
270*5113495bSYour Name 
271*5113495bSYour Name /**
272*5113495bSYour Name  * hal_tx_desc_set_to_fw() - Set To_FW bit in Tx Descriptor.
273*5113495bSYour Name  * @desc:Handle to Tx Descriptor
274*5113495bSYour Name  * @to_fw: if set, Forward packet to FW along with classification result
275*5113495bSYour Name  *
276*5113495bSYour Name  * Return: void
277*5113495bSYour Name  */
hal_tx_desc_set_to_fw(void * desc,uint8_t to_fw)278*5113495bSYour Name static inline void hal_tx_desc_set_to_fw(void *desc, uint8_t to_fw)
279*5113495bSYour Name {
280*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_3, TO_FW) |=
281*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_3, TO_FW, to_fw);
282*5113495bSYour Name }
283*5113495bSYour Name 
284*5113495bSYour Name /**
285*5113495bSYour Name  * hal_tx_desc_set_mesh_en() - Set mesh_enable flag in Tx descriptor
286*5113495bSYour Name  * @hal_soc_hdl: hal soc handle
287*5113495bSYour Name  * @desc: Handle to Tx Descriptor
288*5113495bSYour Name  * @en:   For raw WiFi frames, this indicates transmission to a mesh STA,
289*5113495bSYour Name  *        enabling the interpretation of the 'Mesh Control Present' bit
290*5113495bSYour Name  *        (bit 8) of QoS Control (otherwise this bit is ignored),
291*5113495bSYour Name  *        For native WiFi frames, this indicates that a 'Mesh Control' field
292*5113495bSYour Name  *        is present between the header and the LLC.
293*5113495bSYour Name  *
294*5113495bSYour Name  * Return: void
295*5113495bSYour Name  */
hal_tx_desc_set_mesh_en(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t en)296*5113495bSYour Name static inline void hal_tx_desc_set_mesh_en(hal_soc_handle_t hal_soc_hdl,
297*5113495bSYour Name 					   void *desc, uint8_t en)
298*5113495bSYour Name {
299*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
300*5113495bSYour Name 
301*5113495bSYour Name 	hal_soc->ops->hal_tx_desc_set_mesh_en(desc, en);
302*5113495bSYour Name }
303*5113495bSYour Name 
304*5113495bSYour Name /**
305*5113495bSYour Name  * hal_tx_desc_set_hlos_tid() - Set the TID value (override DSCP/PCP fields in
306*5113495bSYour Name  * frame) to be used for Tx Frame
307*5113495bSYour Name  * @desc: Handle to Tx Descriptor
308*5113495bSYour Name  * @hlos_tid: HLOS TID
309*5113495bSYour Name  *
310*5113495bSYour Name  * Return: void
311*5113495bSYour Name  */
hal_tx_desc_set_hlos_tid(void * desc,uint8_t hlos_tid)312*5113495bSYour Name static inline void hal_tx_desc_set_hlos_tid(void *desc,
313*5113495bSYour Name 					    uint8_t hlos_tid)
314*5113495bSYour Name {
315*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_4, HLOS_TID) |=
316*5113495bSYour Name 		HAL_TX_SM(TCL_DATA_CMD_4, HLOS_TID, hlos_tid);
317*5113495bSYour Name 
318*5113495bSYour Name 	HAL_SET_FLD(desc, TCL_DATA_CMD_4, HLOS_TID_OVERWRITE) |=
319*5113495bSYour Name 	   HAL_TX_SM(TCL_DATA_CMD_4, HLOS_TID_OVERWRITE, 1);
320*5113495bSYour Name }
321*5113495bSYour Name 
322*5113495bSYour Name /**
323*5113495bSYour Name  * hal_tx_desc_set_dscp_tid_table_id() - Sets DSCP to TID conversion table ID
324*5113495bSYour Name  * @hal_soc_hdl: Handle to HAL SoC structure
325*5113495bSYour Name  * @desc: Handle to Tx Descriptor
326*5113495bSYour Name  * @id: DSCP to tid conversion table to be used for this frame
327*5113495bSYour Name  *
328*5113495bSYour Name  * Return: void
329*5113495bSYour Name  */
330*5113495bSYour Name static inline
hal_tx_desc_set_dscp_tid_table_id(hal_soc_handle_t hal_soc_hdl,void * desc,uint8_t id)331*5113495bSYour Name void hal_tx_desc_set_dscp_tid_table_id(hal_soc_handle_t hal_soc_hdl,
332*5113495bSYour Name 				       void *desc, uint8_t id)
333*5113495bSYour Name {
334*5113495bSYour Name 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
335*5113495bSYour Name 
336*5113495bSYour Name 	hal_soc->ops->hal_tx_desc_set_dscp_tid_table_id(desc, id);
337*5113495bSYour Name }
338*5113495bSYour Name 
339*5113495bSYour Name /**
340*5113495bSYour Name  * hal_tx_desc_clear() - Clear the HW descriptor entry
341*5113495bSYour Name  * @hw_desc: Hardware descriptor to be cleared
342*5113495bSYour Name  *
343*5113495bSYour Name  * Return: void
344*5113495bSYour Name  */
hal_tx_desc_clear(void * hw_desc)345*5113495bSYour Name static inline void hal_tx_desc_clear(void *hw_desc)
346*5113495bSYour Name {
347*5113495bSYour Name 	qdf_mem_set(hw_desc + sizeof(struct tlv_32_hdr),
348*5113495bSYour Name 		    HAL_TX_DESC_LEN_BYTES, 0);
349*5113495bSYour Name }
350*5113495bSYour Name 
351*5113495bSYour Name /**
352*5113495bSYour Name  * hal_tx_desc_sync() - Commit the descriptor to Hardware
353*5113495bSYour Name  * @hal_tx_desc_cached: Cached descriptor that software maintains
354*5113495bSYour Name  * @hw_desc: Hardware descriptor to be updated
355*5113495bSYour Name  */
hal_tx_desc_sync(void * hal_tx_desc_cached,void * hw_desc)356*5113495bSYour Name static inline void hal_tx_desc_sync(void *hal_tx_desc_cached,
357*5113495bSYour Name 				    void *hw_desc)
358*5113495bSYour Name {
359*5113495bSYour Name 	qdf_mem_copy((hw_desc + sizeof(struct tlv_32_hdr)),
360*5113495bSYour Name 		     hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
361*5113495bSYour Name }
362*5113495bSYour Name 
363*5113495bSYour Name /*---------------------------------------------------------------------------
364*5113495bSYour Name  * WBM Descriptor accessor APIs for Tx completions
365*5113495bSYour Name  *---------------------------------------------------------------------------
366*5113495bSYour Name  */
367*5113495bSYour Name 
368*5113495bSYour Name /**
369*5113495bSYour Name  * hal_tx_get_wbm_sw0_bm_id() - Get the BM ID for first tx completion ring
370*5113495bSYour Name  *
371*5113495bSYour Name  * Return: BM ID for first tx completion ring
372*5113495bSYour Name  */
hal_tx_get_wbm_sw0_bm_id(void)373*5113495bSYour Name static inline uint32_t hal_tx_get_wbm_sw0_bm_id(void)
374*5113495bSYour Name {
375*5113495bSYour Name 	return HAL_LI_WBM_SW0_BM_ID;
376*5113495bSYour Name }
377*5113495bSYour Name 
378*5113495bSYour Name /**
379*5113495bSYour Name  * hal_tx_comp_get_desc_id() - Get TX descriptor id within comp descriptor
380*5113495bSYour Name  * @hal_desc: completion ring descriptor pointer
381*5113495bSYour Name  *
382*5113495bSYour Name  * This function will tx descriptor id, cookie, within hardware completion
383*5113495bSYour Name  * descriptor
384*5113495bSYour Name  *
385*5113495bSYour Name  * Return: cookie
386*5113495bSYour Name  */
hal_tx_comp_get_desc_id(void * hal_desc)387*5113495bSYour Name static inline uint32_t hal_tx_comp_get_desc_id(void *hal_desc)
388*5113495bSYour Name {
389*5113495bSYour Name 	uint32_t comp_desc =
390*5113495bSYour Name 		*(uint32_t *)(((uint8_t *)hal_desc) +
391*5113495bSYour Name 			       BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET);
392*5113495bSYour Name 
393*5113495bSYour Name 	/* Cookie is placed on 2nd word */
394*5113495bSYour Name 	return (comp_desc & BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK) >>
395*5113495bSYour Name 		BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB;
396*5113495bSYour Name }
397*5113495bSYour Name 
398*5113495bSYour Name /**
399*5113495bSYour Name  * hal_tx_comp_get_paddr() - Get paddr within comp descriptor
400*5113495bSYour Name  * @hal_desc: completion ring descriptor pointer
401*5113495bSYour Name  *
402*5113495bSYour Name  * This function will get buffer physical address within hardware completion
403*5113495bSYour Name  * descriptor
404*5113495bSYour Name  *
405*5113495bSYour Name  * Return: Buffer physical address
406*5113495bSYour Name  */
hal_tx_comp_get_paddr(void * hal_desc)407*5113495bSYour Name static inline qdf_dma_addr_t hal_tx_comp_get_paddr(void *hal_desc)
408*5113495bSYour Name {
409*5113495bSYour Name 	uint32_t paddr_lo;
410*5113495bSYour Name 	uint32_t paddr_hi;
411*5113495bSYour Name 
412*5113495bSYour Name 	paddr_lo = *(uint32_t *)(((uint8_t *)hal_desc) +
413*5113495bSYour Name 			BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET);
414*5113495bSYour Name 
415*5113495bSYour Name 	paddr_hi = *(uint32_t *)(((uint8_t *)hal_desc) +
416*5113495bSYour Name 			BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET);
417*5113495bSYour Name 
418*5113495bSYour Name 	paddr_hi = (paddr_hi & BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK) >>
419*5113495bSYour Name 		BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB;
420*5113495bSYour Name 
421*5113495bSYour Name 	return (qdf_dma_addr_t)(paddr_lo | (((uint64_t)paddr_hi) << 32));
422*5113495bSYour Name }
423*5113495bSYour Name #endif /* _HAL_LI_TX_H_ */
424