1*5113495bSYour Name /*
2*5113495bSYour Name * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
3*5113495bSYour Name * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name *
5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for
6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the
7*5113495bSYour Name * above copyright notice and this permission notice appear in all
8*5113495bSYour Name * copies.
9*5113495bSYour Name *
10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE.
18*5113495bSYour Name */
19*5113495bSYour Name #include "tcl_data_cmd.h"
20*5113495bSYour Name #include "mac_tcl_reg_seq_hwioreg.h"
21*5113495bSYour Name #include "phyrx_rssi_legacy.h"
22*5113495bSYour Name #include "hal_hw_headers.h"
23*5113495bSYour Name #include "hal_internal.h"
24*5113495bSYour Name #include "cdp_txrx_mon_struct.h"
25*5113495bSYour Name #include "qdf_trace.h"
26*5113495bSYour Name #include "hal_rx.h"
27*5113495bSYour Name #include "hal_tx.h"
28*5113495bSYour Name #include "dp_types.h"
29*5113495bSYour Name #include "hal_api_mon.h"
30*5113495bSYour Name
31*5113495bSYour Name /**
32*5113495bSYour Name * hal_tx_desc_set_dscp_tid_table_id_6390() - Sets DSCP to TID conversion
33*5113495bSYour Name * table ID
34*5113495bSYour Name * @desc: Handle to Tx Descriptor
35*5113495bSYour Name * @id: DSCP to tid conversion table to be used for this frame
36*5113495bSYour Name *
37*5113495bSYour Name * Return: void
38*5113495bSYour Name */
hal_tx_desc_set_dscp_tid_table_id_6390(void * desc,uint8_t id)39*5113495bSYour Name static void hal_tx_desc_set_dscp_tid_table_id_6390(void *desc, uint8_t id)
40*5113495bSYour Name {
41*5113495bSYour Name HAL_SET_FLD(desc, TCL_DATA_CMD_5,
42*5113495bSYour Name DSCP_TID_TABLE_NUM) |=
43*5113495bSYour Name HAL_TX_SM(TCL_DATA_CMD_5,
44*5113495bSYour Name DSCP_TID_TABLE_NUM, id);
45*5113495bSYour Name }
46*5113495bSYour Name
47*5113495bSYour Name #define DSCP_TID_TABLE_SIZE 24
48*5113495bSYour Name #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4)
49*5113495bSYour Name
50*5113495bSYour Name /**
51*5113495bSYour Name * hal_tx_set_dscp_tid_map_6390() - Configure default DSCP to TID map table
52*5113495bSYour Name * @soc: HAL SoC context
53*5113495bSYour Name * @map: DSCP-TID mapping table
54*5113495bSYour Name * @id: mapping table ID - 0-31
55*5113495bSYour Name *
56*5113495bSYour Name * DSCP are mapped to 8 TID values using TID values programmed
57*5113495bSYour Name * in any of the 32 DSCP_TID_MAPS (id = 0-31).
58*5113495bSYour Name *
59*5113495bSYour Name * Return: none
60*5113495bSYour Name */
hal_tx_set_dscp_tid_map_6390(struct hal_soc * soc,uint8_t * map,uint8_t id)61*5113495bSYour Name static void hal_tx_set_dscp_tid_map_6390(struct hal_soc *soc, uint8_t *map,
62*5113495bSYour Name uint8_t id)
63*5113495bSYour Name {
64*5113495bSYour Name int i;
65*5113495bSYour Name uint32_t addr, cmn_reg_addr;
66*5113495bSYour Name uint32_t value = 0, regval;
67*5113495bSYour Name uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
68*5113495bSYour Name
69*5113495bSYour Name if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
70*5113495bSYour Name return;
71*5113495bSYour Name
72*5113495bSYour Name cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(
73*5113495bSYour Name SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
74*5113495bSYour Name
75*5113495bSYour Name addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
76*5113495bSYour Name SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET,
77*5113495bSYour Name id * NUM_WORDS_PER_DSCP_TID_TABLE);
78*5113495bSYour Name
79*5113495bSYour Name /* Enable read/write access */
80*5113495bSYour Name regval = HAL_REG_READ(soc, cmn_reg_addr);
81*5113495bSYour Name regval |=
82*5113495bSYour Name (1 << HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT);
83*5113495bSYour Name
84*5113495bSYour Name HAL_REG_WRITE(soc, cmn_reg_addr, regval);
85*5113495bSYour Name
86*5113495bSYour Name /* Write 8 (24 bits) DSCP-TID mappings in each iteration */
87*5113495bSYour Name for (i = 0; i < 64; i += 8) {
88*5113495bSYour Name value = (map[i] |
89*5113495bSYour Name (map[i + 1] << 0x3) |
90*5113495bSYour Name (map[i + 2] << 0x6) |
91*5113495bSYour Name (map[i + 3] << 0x9) |
92*5113495bSYour Name (map[i + 4] << 0xc) |
93*5113495bSYour Name (map[i + 5] << 0xf) |
94*5113495bSYour Name (map[i + 6] << 0x12) |
95*5113495bSYour Name (map[i + 7] << 0x15));
96*5113495bSYour Name
97*5113495bSYour Name qdf_mem_copy(&val[cnt], &value, 3);
98*5113495bSYour Name cnt += 3;
99*5113495bSYour Name }
100*5113495bSYour Name
101*5113495bSYour Name for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) {
102*5113495bSYour Name regval = *(uint32_t *)(val + i);
103*5113495bSYour Name HAL_REG_WRITE(soc, addr,
104*5113495bSYour Name (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
105*5113495bSYour Name addr += 4;
106*5113495bSYour Name }
107*5113495bSYour Name
108*5113495bSYour Name /* Disable read/write access */
109*5113495bSYour Name regval = HAL_REG_READ(soc, cmn_reg_addr);
110*5113495bSYour Name regval &=
111*5113495bSYour Name ~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK);
112*5113495bSYour Name
113*5113495bSYour Name HAL_REG_WRITE(soc, cmn_reg_addr, regval);
114*5113495bSYour Name }
115*5113495bSYour Name
116*5113495bSYour Name /**
117*5113495bSYour Name * hal_tx_update_dscp_tid_6390() - Update the dscp tid map table as updated
118*5113495bSYour Name * by the user
119*5113495bSYour Name * @soc: HAL SoC context
120*5113495bSYour Name * @tid: TID mapping table
121*5113495bSYour Name * @id : MAP ID
122*5113495bSYour Name * @dscp: DSCP_TID map index
123*5113495bSYour Name *
124*5113495bSYour Name * Return: void
125*5113495bSYour Name */
hal_tx_update_dscp_tid_6390(struct hal_soc * soc,uint8_t tid,uint8_t id,uint8_t dscp)126*5113495bSYour Name static void hal_tx_update_dscp_tid_6390(struct hal_soc *soc, uint8_t tid,
127*5113495bSYour Name uint8_t id, uint8_t dscp)
128*5113495bSYour Name {
129*5113495bSYour Name int index;
130*5113495bSYour Name uint32_t addr;
131*5113495bSYour Name uint32_t value;
132*5113495bSYour Name uint32_t regval;
133*5113495bSYour Name
134*5113495bSYour Name addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
135*5113495bSYour Name SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
136*5113495bSYour Name
137*5113495bSYour Name index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
138*5113495bSYour Name addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER);
139*5113495bSYour Name value = tid << (HAL_TX_BITS_PER_TID * index);
140*5113495bSYour Name
141*5113495bSYour Name regval = HAL_REG_READ(soc, addr);
142*5113495bSYour Name regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
143*5113495bSYour Name regval |= value;
144*5113495bSYour Name
145*5113495bSYour Name HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
146*5113495bSYour Name }
147*5113495bSYour Name
148*5113495bSYour Name /**
149*5113495bSYour Name * hal_tx_desc_set_lmac_id_6390() - Set the lmac_id value
150*5113495bSYour Name * @desc: Handle to Tx Descriptor
151*5113495bSYour Name * @lmac_id: mac Id to ast matching
152*5113495bSYour Name * b00 – mac 0
153*5113495bSYour Name * b01 – mac 1
154*5113495bSYour Name * b10 – mac 2
155*5113495bSYour Name * b11 – all macs (legacy HK way)
156*5113495bSYour Name *
157*5113495bSYour Name * Return: void
158*5113495bSYour Name */
hal_tx_desc_set_lmac_id_6390(void * desc,uint8_t lmac_id)159*5113495bSYour Name static void hal_tx_desc_set_lmac_id_6390(void *desc, uint8_t lmac_id)
160*5113495bSYour Name {
161*5113495bSYour Name HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |=
162*5113495bSYour Name HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id);
163*5113495bSYour Name }
164*5113495bSYour Name
165*5113495bSYour Name /**
166*5113495bSYour Name * hal_tx_init_cmd_credit_ring_6390() - Initialize command/credit SRNG
167*5113495bSYour Name * @hal_soc_hdl: Handle to HAL SoC structure
168*5113495bSYour Name * @hal_ring_hdl: Handle to HAL SRNG structure
169*5113495bSYour Name *
170*5113495bSYour Name * Return: none
171*5113495bSYour Name */
hal_tx_init_cmd_credit_ring_6390(hal_soc_handle_t hal_soc_hdl,hal_ring_handle_t hal_ring_hdl)172*5113495bSYour Name static inline void hal_tx_init_cmd_credit_ring_6390(hal_soc_handle_t hal_soc_hdl,
173*5113495bSYour Name hal_ring_handle_t hal_ring_hdl)
174*5113495bSYour Name {
175*5113495bSYour Name }
176