1*5113495bSYour Name /*
2*5113495bSYour Name * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
3*5113495bSYour Name * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name *
5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for
6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the
7*5113495bSYour Name * above copyright notice and this permission notice appear in all
8*5113495bSYour Name * copies.
9*5113495bSYour Name *
10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE.
18*5113495bSYour Name */
19*5113495bSYour Name
20*5113495bSYour Name #ifndef _HAL_6490_RX_H_
21*5113495bSYour Name #define _HAL_6490_RX_H_
22*5113495bSYour Name #include "qdf_util.h"
23*5113495bSYour Name #include "qdf_types.h"
24*5113495bSYour Name #include "qdf_lock.h"
25*5113495bSYour Name #include "qdf_mem.h"
26*5113495bSYour Name #include "qdf_nbuf.h"
27*5113495bSYour Name #include "tcl_data_cmd.h"
28*5113495bSYour Name #include "mac_tcl_reg_seq_hwioreg.h"
29*5113495bSYour Name #include "phyrx_rssi_legacy.h"
30*5113495bSYour Name #include "rx_msdu_start.h"
31*5113495bSYour Name #include "tlv_tag_def.h"
32*5113495bSYour Name #include "hal_hw_headers.h"
33*5113495bSYour Name #include "hal_internal.h"
34*5113495bSYour Name #include "cdp_txrx_mon_struct.h"
35*5113495bSYour Name #include "qdf_trace.h"
36*5113495bSYour Name #include "hal_rx.h"
37*5113495bSYour Name #include "hal_tx.h"
38*5113495bSYour Name #include "dp_types.h"
39*5113495bSYour Name #include "hal_api_mon.h"
40*5113495bSYour Name #include "phyrx_other_receive_info_ru_details.h"
41*5113495bSYour Name
42*5113495bSYour Name #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
43*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
44*5113495bSYour Name RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \
45*5113495bSYour Name RX_MSDU_START_5_MIMO_SS_BITMAP_MASK, \
46*5113495bSYour Name RX_MSDU_START_5_MIMO_SS_BITMAP_LSB))
47*5113495bSYour Name
48*5113495bSYour Name #define HAL_RX_MPDU_GET_SEQUENCE_NUMBER(_rx_mpdu_info) \
49*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
50*5113495bSYour Name RX_MPDU_INFO_11_MPDU_SEQUENCE_NUMBER_OFFSET)), \
51*5113495bSYour Name RX_MPDU_INFO_11_MPDU_SEQUENCE_NUMBER_MASK, \
52*5113495bSYour Name RX_MPDU_INFO_11_MPDU_SEQUENCE_NUMBER_LSB))
53*5113495bSYour Name
54*5113495bSYour Name #define HAL_RX_MSDU_END_DA_IS_MCBC_GET(_rx_msdu_end) \
55*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
56*5113495bSYour Name RX_MSDU_END_10_DA_IS_MCBC_OFFSET)), \
57*5113495bSYour Name RX_MSDU_END_10_DA_IS_MCBC_MASK, \
58*5113495bSYour Name RX_MSDU_END_10_DA_IS_MCBC_LSB))
59*5113495bSYour Name
60*5113495bSYour Name #define HAL_RX_MSDU_END_SA_IS_VALID_GET(_rx_msdu_end) \
61*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
62*5113495bSYour Name RX_MSDU_END_10_SA_IS_VALID_OFFSET)), \
63*5113495bSYour Name RX_MSDU_END_10_SA_IS_VALID_MASK, \
64*5113495bSYour Name RX_MSDU_END_10_SA_IS_VALID_LSB))
65*5113495bSYour Name
66*5113495bSYour Name #define HAL_RX_MSDU_END_SA_IDX_GET(_rx_msdu_end) \
67*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
68*5113495bSYour Name RX_MSDU_END_11_SA_IDX_OFFSET)), \
69*5113495bSYour Name RX_MSDU_END_11_SA_IDX_MASK, \
70*5113495bSYour Name RX_MSDU_END_11_SA_IDX_LSB))
71*5113495bSYour Name
72*5113495bSYour Name #define HAL_RX_MSDU_END_L3_HEADER_PADDING_GET(_rx_msdu_end) \
73*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
74*5113495bSYour Name RX_MSDU_END_10_L3_HEADER_PADDING_OFFSET)), \
75*5113495bSYour Name RX_MSDU_END_10_L3_HEADER_PADDING_MASK, \
76*5113495bSYour Name RX_MSDU_END_10_L3_HEADER_PADDING_LSB))
77*5113495bSYour Name
78*5113495bSYour Name #define HAL_RX_MPDU_ENCRYPTION_INFO_VALID(_rx_mpdu_info) \
79*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
80*5113495bSYour Name RX_MPDU_INFO_11_FRAME_ENCRYPTION_INFO_VALID_OFFSET)), \
81*5113495bSYour Name RX_MPDU_INFO_11_FRAME_ENCRYPTION_INFO_VALID_MASK, \
82*5113495bSYour Name RX_MPDU_INFO_11_FRAME_ENCRYPTION_INFO_VALID_LSB))
83*5113495bSYour Name
84*5113495bSYour Name #define HAL_RX_MPDU_PN_31_0_GET(_rx_mpdu_info) \
85*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
86*5113495bSYour Name RX_MPDU_INFO_3_PN_31_0_OFFSET)), \
87*5113495bSYour Name RX_MPDU_INFO_3_PN_31_0_MASK, \
88*5113495bSYour Name RX_MPDU_INFO_3_PN_31_0_LSB))
89*5113495bSYour Name
90*5113495bSYour Name #define HAL_RX_MPDU_PN_63_32_GET(_rx_mpdu_info) \
91*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
92*5113495bSYour Name RX_MPDU_INFO_4_PN_63_32_OFFSET)), \
93*5113495bSYour Name RX_MPDU_INFO_4_PN_63_32_MASK, \
94*5113495bSYour Name RX_MPDU_INFO_4_PN_63_32_LSB))
95*5113495bSYour Name
96*5113495bSYour Name #define HAL_RX_MPDU_PN_95_64_GET(_rx_mpdu_info) \
97*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
98*5113495bSYour Name RX_MPDU_INFO_5_PN_95_64_OFFSET)), \
99*5113495bSYour Name RX_MPDU_INFO_5_PN_95_64_MASK, \
100*5113495bSYour Name RX_MPDU_INFO_5_PN_95_64_LSB))
101*5113495bSYour Name
102*5113495bSYour Name #define HAL_RX_MPDU_PN_127_96_GET(_rx_mpdu_info) \
103*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
104*5113495bSYour Name RX_MPDU_INFO_6_PN_127_96_OFFSET)), \
105*5113495bSYour Name RX_MPDU_INFO_6_PN_127_96_MASK, \
106*5113495bSYour Name RX_MPDU_INFO_6_PN_127_96_LSB))
107*5113495bSYour Name
108*5113495bSYour Name #define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
109*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
110*5113495bSYour Name RX_MSDU_END_10_FIRST_MSDU_OFFSET)), \
111*5113495bSYour Name RX_MSDU_END_10_FIRST_MSDU_MASK, \
112*5113495bSYour Name RX_MSDU_END_10_FIRST_MSDU_LSB))
113*5113495bSYour Name
114*5113495bSYour Name #define HAL_RX_MSDU_END_DA_IS_VALID_GET(_rx_msdu_end) \
115*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
116*5113495bSYour Name RX_MSDU_END_10_DA_IS_VALID_OFFSET)), \
117*5113495bSYour Name RX_MSDU_END_10_DA_IS_VALID_MASK, \
118*5113495bSYour Name RX_MSDU_END_10_DA_IS_VALID_LSB))
119*5113495bSYour Name
120*5113495bSYour Name #define HAL_RX_MSDU_END_LAST_MSDU_GET(_rx_msdu_end) \
121*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
122*5113495bSYour Name RX_MSDU_END_10_LAST_MSDU_OFFSET)), \
123*5113495bSYour Name RX_MSDU_END_10_LAST_MSDU_MASK, \
124*5113495bSYour Name RX_MSDU_END_10_LAST_MSDU_LSB))
125*5113495bSYour Name
126*5113495bSYour Name #define HAL_RX_MPDU_GET_MAC_AD4_VALID(_rx_mpdu_info) \
127*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
128*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD4_VALID_OFFSET)), \
129*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD4_VALID_MASK, \
130*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD4_VALID_LSB))
131*5113495bSYour Name
132*5113495bSYour Name #define HAL_RX_MPDU_INFO_SW_PEER_ID_GET(_rx_mpdu_info) \
133*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_info), \
134*5113495bSYour Name RX_MPDU_INFO_10_SW_PEER_ID_OFFSET)), \
135*5113495bSYour Name RX_MPDU_INFO_10_SW_PEER_ID_MASK, \
136*5113495bSYour Name RX_MPDU_INFO_10_SW_PEER_ID_LSB))
137*5113495bSYour Name
138*5113495bSYour Name #define HAL_RX_MPDU_GET_TODS(_rx_mpdu_info) \
139*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
140*5113495bSYour Name RX_MPDU_INFO_11_TO_DS_OFFSET)), \
141*5113495bSYour Name RX_MPDU_INFO_11_TO_DS_MASK, \
142*5113495bSYour Name RX_MPDU_INFO_11_TO_DS_LSB))
143*5113495bSYour Name
144*5113495bSYour Name #define HAL_RX_MPDU_GET_FROMDS(_rx_mpdu_info) \
145*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
146*5113495bSYour Name RX_MPDU_INFO_11_FR_DS_OFFSET)), \
147*5113495bSYour Name RX_MPDU_INFO_11_FR_DS_MASK, \
148*5113495bSYour Name RX_MPDU_INFO_11_FR_DS_LSB))
149*5113495bSYour Name
150*5113495bSYour Name #define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
151*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
152*5113495bSYour Name RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
153*5113495bSYour Name RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_MASK, \
154*5113495bSYour Name RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_LSB))
155*5113495bSYour Name
156*5113495bSYour Name #define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \
157*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
158*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD1_VALID_OFFSET)), \
159*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD1_VALID_MASK, \
160*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD1_VALID_LSB))
161*5113495bSYour Name
162*5113495bSYour Name #define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \
163*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
164*5113495bSYour Name RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \
165*5113495bSYour Name RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \
166*5113495bSYour Name RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB))
167*5113495bSYour Name
168*5113495bSYour Name #define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \
169*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
170*5113495bSYour Name RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \
171*5113495bSYour Name RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \
172*5113495bSYour Name RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB))
173*5113495bSYour Name
174*5113495bSYour Name #define HAL_RX_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_mpdu_info) \
175*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
176*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD2_VALID_OFFSET)), \
177*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD2_VALID_MASK, \
178*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD2_VALID_LSB))
179*5113495bSYour Name
180*5113495bSYour Name #define HAL_RX_MPDU_AD2_15_0_GET(_rx_mpdu_info) \
181*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
182*5113495bSYour Name RX_MPDU_INFO_16_MAC_ADDR_AD2_15_0_OFFSET)), \
183*5113495bSYour Name RX_MPDU_INFO_16_MAC_ADDR_AD2_15_0_MASK, \
184*5113495bSYour Name RX_MPDU_INFO_16_MAC_ADDR_AD2_15_0_LSB))
185*5113495bSYour Name
186*5113495bSYour Name #define HAL_RX_MPDU_AD2_47_16_GET(_rx_mpdu_info) \
187*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
188*5113495bSYour Name RX_MPDU_INFO_17_MAC_ADDR_AD2_47_16_OFFSET)), \
189*5113495bSYour Name RX_MPDU_INFO_17_MAC_ADDR_AD2_47_16_MASK, \
190*5113495bSYour Name RX_MPDU_INFO_17_MAC_ADDR_AD2_47_16_LSB))
191*5113495bSYour Name
192*5113495bSYour Name #define HAL_RX_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_mpdu_info) \
193*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
194*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD3_VALID_OFFSET)), \
195*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD3_VALID_MASK, \
196*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD3_VALID_LSB))
197*5113495bSYour Name
198*5113495bSYour Name #define HAL_RX_MPDU_AD3_31_0_GET(_rx_mpdu_info) \
199*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
200*5113495bSYour Name RX_MPDU_INFO_18_MAC_ADDR_AD3_31_0_OFFSET)), \
201*5113495bSYour Name RX_MPDU_INFO_18_MAC_ADDR_AD3_31_0_MASK, \
202*5113495bSYour Name RX_MPDU_INFO_18_MAC_ADDR_AD3_31_0_LSB))
203*5113495bSYour Name
204*5113495bSYour Name #define HAL_RX_MPDU_AD3_47_32_GET(_rx_mpdu_info) \
205*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
206*5113495bSYour Name RX_MPDU_INFO_19_MAC_ADDR_AD3_47_32_OFFSET)), \
207*5113495bSYour Name RX_MPDU_INFO_19_MAC_ADDR_AD3_47_32_MASK, \
208*5113495bSYour Name RX_MPDU_INFO_19_MAC_ADDR_AD3_47_32_LSB))
209*5113495bSYour Name
210*5113495bSYour Name #define HAL_RX_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_mpdu_info) \
211*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
212*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD4_VALID_OFFSET)), \
213*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD4_VALID_MASK, \
214*5113495bSYour Name RX_MPDU_INFO_11_MAC_ADDR_AD4_VALID_LSB))
215*5113495bSYour Name
216*5113495bSYour Name #define HAL_RX_MPDU_AD4_31_0_GET(_rx_mpdu_info) \
217*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
218*5113495bSYour Name RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_OFFSET)), \
219*5113495bSYour Name RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_MASK, \
220*5113495bSYour Name RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_LSB))
221*5113495bSYour Name
222*5113495bSYour Name #define HAL_RX_MPDU_AD4_47_32_GET(_rx_mpdu_info) \
223*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
224*5113495bSYour Name RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \
225*5113495bSYour Name RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \
226*5113495bSYour Name RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB))
227*5113495bSYour Name
228*5113495bSYour Name #define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \
229*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
230*5113495bSYour Name RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \
231*5113495bSYour Name RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_MASK, \
232*5113495bSYour Name RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_LSB))
233*5113495bSYour Name
234*5113495bSYour Name #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_mpdu_info) \
235*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_info), \
236*5113495bSYour Name RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_OFFSET)),\
237*5113495bSYour Name RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_MASK, \
238*5113495bSYour Name RX_MPDU_INFO_11_MPDU_QOS_CONTROL_VALID_LSB))
239*5113495bSYour Name
240*5113495bSYour Name #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \
241*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
242*5113495bSYour Name RX_MSDU_END_14_SA_SW_PEER_ID_OFFSET)), \
243*5113495bSYour Name RX_MSDU_END_14_SA_SW_PEER_ID_MASK, \
244*5113495bSYour Name RX_MSDU_END_14_SA_SW_PEER_ID_LSB))
245*5113495bSYour Name
246*5113495bSYour Name #define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
247*5113495bSYour Name (uint8_t *)(link_desc_va) + \
248*5113495bSYour Name RX_MSDU_LINK_8_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET
249*5113495bSYour Name
250*5113495bSYour Name #define HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0) \
251*5113495bSYour Name (uint8_t *)(msdu0) + \
252*5113495bSYour Name RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET
253*5113495bSYour Name
254*5113495bSYour Name #define HAL_ENT_MPDU_DESC_INFO(ent_ring_desc) \
255*5113495bSYour Name (uint8_t *)(ent_ring_desc) + \
256*5113495bSYour Name RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET
257*5113495bSYour Name
258*5113495bSYour Name #define HAL_DST_MPDU_DESC_INFO(dst_ring_desc) \
259*5113495bSYour Name (uint8_t *)(dst_ring_desc) + \
260*5113495bSYour Name REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET
261*5113495bSYour Name
262*5113495bSYour Name #define HAL_RX_GET_FC_VALID(rx_mpdu_start) \
263*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_11, MPDU_FRAME_CONTROL_VALID)
264*5113495bSYour Name
265*5113495bSYour Name #define HAL_RX_GET_TO_DS_FLAG(rx_mpdu_start) \
266*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_11, TO_DS)
267*5113495bSYour Name
268*5113495bSYour Name #define HAL_RX_GET_MAC_ADDR1_VALID(rx_mpdu_start) \
269*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_11, MAC_ADDR_AD1_VALID)
270*5113495bSYour Name
271*5113495bSYour Name #define HAL_RX_GET_MAC_ADDR2_VALID(rx_mpdu_start) \
272*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_11, MAC_ADDR_AD2_VALID)
273*5113495bSYour Name
274*5113495bSYour Name #define HAL_RX_GET_FILTER_CATEGORY(rx_mpdu_start) \
275*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_9, RXPCU_MPDU_FILTER_IN_CATEGORY)
276*5113495bSYour Name
277*5113495bSYour Name #define HAL_RX_GET_PPDU_ID(rx_mpdu_start) \
278*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_9, PHY_PPDU_ID)
279*5113495bSYour Name
280*5113495bSYour Name #define HAL_RX_GET_SW_FRAME_GROUP_ID(rx_mpdu_start) \
281*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_9, SW_FRAME_GROUP_ID)
282*5113495bSYour Name
283*5113495bSYour Name #define HAL_RX_GET_SW_PEER_ID(rx_mpdu_start) \
284*5113495bSYour Name HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_10, SW_PEER_ID)
285*5113495bSYour Name
286*5113495bSYour Name #define HAL_REO_R0_CONFIG(soc, reg_val, reo_params) \
287*5113495bSYour Name do { \
288*5113495bSYour Name reg_val &= \
289*5113495bSYour Name ~(HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK |\
290*5113495bSYour Name HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK); \
291*5113495bSYour Name reg_val |= \
292*5113495bSYour Name HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
293*5113495bSYour Name AGING_LIST_ENABLE, 1) |\
294*5113495bSYour Name HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
295*5113495bSYour Name AGING_FLUSH_ENABLE, 1);\
296*5113495bSYour Name HAL_REG_WRITE((soc), \
297*5113495bSYour Name HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
298*5113495bSYour Name SEQ_WCSS_UMAC_REO_REG_OFFSET), \
299*5113495bSYour Name (reg_val)); \
300*5113495bSYour Name reg_val = \
301*5113495bSYour Name HAL_REG_READ((soc), \
302*5113495bSYour Name HWIO_REO_R0_MISC_CTL_ADDR( \
303*5113495bSYour Name SEQ_WCSS_UMAC_REO_REG_OFFSET)); \
304*5113495bSYour Name reg_val &= \
305*5113495bSYour Name ~(HWIO_REO_R0_MISC_CTL_FRAGMENT_DEST_RING_BMSK); \
306*5113495bSYour Name reg_val |= \
307*5113495bSYour Name HAL_SM(HWIO_REO_R0_MISC_CTL, \
308*5113495bSYour Name FRAGMENT_DEST_RING, \
309*5113495bSYour Name (reo_params)->frag_dst_ring); \
310*5113495bSYour Name HAL_REG_WRITE((soc), \
311*5113495bSYour Name HWIO_REO_R0_MISC_CTL_ADDR( \
312*5113495bSYour Name SEQ_WCSS_UMAC_REO_REG_OFFSET), \
313*5113495bSYour Name (reg_val)); \
314*5113495bSYour Name reg_val = \
315*5113495bSYour Name HAL_REG_READ((soc), \
316*5113495bSYour Name HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
317*5113495bSYour Name SEQ_WCSS_UMAC_REO_REG_OFFSET)); \
318*5113495bSYour Name reg_val &= \
319*5113495bSYour Name (~HWIO_REO_R0_GENERAL_ENABLE_BAR_DEST_RING_BMSK |\
320*5113495bSYour Name (REO_REMAP_TCL << HWIO_REO_R0_GENERAL_ENABLE_BAR_DEST_RING_SHFT)); \
321*5113495bSYour Name HAL_REG_WRITE((soc), \
322*5113495bSYour Name HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
323*5113495bSYour Name SEQ_WCSS_UMAC_REO_REG_OFFSET), \
324*5113495bSYour Name (reg_val)); \
325*5113495bSYour Name } while (0)
326*5113495bSYour Name
327*5113495bSYour Name #define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
328*5113495bSYour Name ((struct rx_msdu_desc_info *) \
329*5113495bSYour Name _OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
330*5113495bSYour Name RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
331*5113495bSYour Name
332*5113495bSYour Name #define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc) \
333*5113495bSYour Name ((struct rx_msdu_details *) \
334*5113495bSYour Name _OFFSET_TO_BYTE_PTR((link_desc),\
335*5113495bSYour Name RX_MSDU_LINK_8_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET))
336*5113495bSYour Name
337*5113495bSYour Name #define HAL_RX_MSDU_END_FLOW_IDX_GET(_rx_msdu_end) \
338*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
339*5113495bSYour Name RX_MSDU_END_12_FLOW_IDX_OFFSET)), \
340*5113495bSYour Name RX_MSDU_END_12_FLOW_IDX_MASK, \
341*5113495bSYour Name RX_MSDU_END_12_FLOW_IDX_LSB))
342*5113495bSYour Name
343*5113495bSYour Name #define HAL_RX_MSDU_END_REO_DEST_IND_GET(_rx_msdu_end) \
344*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
345*5113495bSYour Name RX_MSDU_END_12_REO_DESTINATION_INDICATION_OFFSET)), \
346*5113495bSYour Name RX_MSDU_END_12_REO_DESTINATION_INDICATION_MASK, \
347*5113495bSYour Name RX_MSDU_END_12_REO_DESTINATION_INDICATION_LSB))
348*5113495bSYour Name
349*5113495bSYour Name #define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \
350*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
351*5113495bSYour Name RX_MSDU_END_10_FLOW_IDX_INVALID_OFFSET)), \
352*5113495bSYour Name RX_MSDU_END_10_FLOW_IDX_INVALID_MASK, \
353*5113495bSYour Name RX_MSDU_END_10_FLOW_IDX_INVALID_LSB))
354*5113495bSYour Name
355*5113495bSYour Name #define HAL_RX_MSDU_END_FLOW_IDX_TIMEOUT_GET(_rx_msdu_end) \
356*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
357*5113495bSYour Name RX_MSDU_END_10_FLOW_IDX_TIMEOUT_OFFSET)), \
358*5113495bSYour Name RX_MSDU_END_10_FLOW_IDX_TIMEOUT_MASK, \
359*5113495bSYour Name RX_MSDU_END_10_FLOW_IDX_TIMEOUT_LSB))
360*5113495bSYour Name
361*5113495bSYour Name #define HAL_RX_MSDU_END_FSE_METADATA_GET(_rx_msdu_end) \
362*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
363*5113495bSYour Name RX_MSDU_END_13_FSE_METADATA_OFFSET)), \
364*5113495bSYour Name RX_MSDU_END_13_FSE_METADATA_MASK, \
365*5113495bSYour Name RX_MSDU_END_13_FSE_METADATA_LSB))
366*5113495bSYour Name
367*5113495bSYour Name #define HAL_RX_MSDU_END_CCE_METADATA_GET(_rx_msdu_end) \
368*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
369*5113495bSYour Name RX_MSDU_END_14_CCE_METADATA_OFFSET)), \
370*5113495bSYour Name RX_MSDU_END_14_CCE_METADATA_MASK, \
371*5113495bSYour Name RX_MSDU_END_14_CCE_METADATA_LSB))
372*5113495bSYour Name
373*5113495bSYour Name #define HAL_RX_TLV_GET_TCP_CHKSUM(buf) \
374*5113495bSYour Name (_HAL_MS( \
375*5113495bSYour Name (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
376*5113495bSYour Name msdu_end_tlv.rx_msdu_end), \
377*5113495bSYour Name RX_MSDU_END_10_TCP_UDP_CHKSUM_OFFSET)), \
378*5113495bSYour Name RX_MSDU_END_10_TCP_UDP_CHKSUM_MASK, \
379*5113495bSYour Name RX_MSDU_END_10_TCP_UDP_CHKSUM_LSB))
380*5113495bSYour Name
381*5113495bSYour Name #define HAL_RX_MSDU_END_DA_IDX_GET(_rx_msdu_end) \
382*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
383*5113495bSYour Name RX_MSDU_END_11_DA_IDX_OR_SW_PEER_ID_OFFSET)), \
384*5113495bSYour Name RX_MSDU_END_11_DA_IDX_OR_SW_PEER_ID_MASK, \
385*5113495bSYour Name RX_MSDU_END_11_DA_IDX_OR_SW_PEER_ID_LSB))
386*5113495bSYour Name
387*5113495bSYour Name #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(buf) \
388*5113495bSYour Name (_HAL_MS( \
389*5113495bSYour Name (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
390*5113495bSYour Name msdu_end_tlv.rx_msdu_end), \
391*5113495bSYour Name RX_MSDU_END_17_FLOW_AGGREGATION_CONTINUATION_OFFSET)), \
392*5113495bSYour Name RX_MSDU_END_17_FLOW_AGGREGATION_CONTINUATION_MASK, \
393*5113495bSYour Name RX_MSDU_END_17_FLOW_AGGREGATION_CONTINUATION_LSB))
394*5113495bSYour Name
395*5113495bSYour Name #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(buf) \
396*5113495bSYour Name (_HAL_MS( \
397*5113495bSYour Name (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
398*5113495bSYour Name msdu_end_tlv.rx_msdu_end), \
399*5113495bSYour Name RX_MSDU_END_17_AGGREGATION_COUNT_OFFSET)), \
400*5113495bSYour Name RX_MSDU_END_17_AGGREGATION_COUNT_MASK, \
401*5113495bSYour Name RX_MSDU_END_17_AGGREGATION_COUNT_LSB))
402*5113495bSYour Name
403*5113495bSYour Name #define HAL_RX_TLV_GET_FISA_TIMEOUT(buf) \
404*5113495bSYour Name (_HAL_MS( \
405*5113495bSYour Name (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
406*5113495bSYour Name msdu_end_tlv.rx_msdu_end), \
407*5113495bSYour Name RX_MSDU_END_17_FISA_TIMEOUT_OFFSET)), \
408*5113495bSYour Name RX_MSDU_END_17_FISA_TIMEOUT_MASK, \
409*5113495bSYour Name RX_MSDU_END_17_FISA_TIMEOUT_LSB))
410*5113495bSYour Name
411*5113495bSYour Name #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(buf) \
412*5113495bSYour Name (_HAL_MS( \
413*5113495bSYour Name (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
414*5113495bSYour Name msdu_end_tlv.rx_msdu_end), \
415*5113495bSYour Name RX_MSDU_END_18_CUMULATIVE_L4_CHECKSUM_OFFSET)), \
416*5113495bSYour Name RX_MSDU_END_18_CUMULATIVE_L4_CHECKSUM_MASK, \
417*5113495bSYour Name RX_MSDU_END_18_CUMULATIVE_L4_CHECKSUM_LSB))
418*5113495bSYour Name
419*5113495bSYour Name #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(buf) \
420*5113495bSYour Name (_HAL_MS( \
421*5113495bSYour Name (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
422*5113495bSYour Name msdu_end_tlv.rx_msdu_end), \
423*5113495bSYour Name RX_MSDU_END_18_CUMULATIVE_IP_LENGTH_OFFSET)), \
424*5113495bSYour Name RX_MSDU_END_18_CUMULATIVE_IP_LENGTH_MASK, \
425*5113495bSYour Name RX_MSDU_END_18_CUMULATIVE_IP_LENGTH_LSB))
426*5113495bSYour Name
427*5113495bSYour Name #define HAL_RX_MSDU_END_RESERVED_1A_GET(_rx_msdu_end) \
428*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
429*5113495bSYour Name RX_MSDU_END_1_RESERVED_1A_OFFSET)), \
430*5113495bSYour Name RX_MSDU_END_1_RESERVED_1A_MASK, \
431*5113495bSYour Name RX_MSDU_END_1_RESERVED_1A_LSB))
432*5113495bSYour Name
433*5113495bSYour Name #define HAL_RX_MSDU_END_L3_TYPE_GET(_rx_msdu_end) \
434*5113495bSYour Name (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
435*5113495bSYour Name RX_MSDU_END_5_L3_TYPE_OFFSET)), \
436*5113495bSYour Name RX_MSDU_END_5_L3_TYPE_MASK, \
437*5113495bSYour Name RX_MSDU_END_5_L3_TYPE_LSB))
438*5113495bSYour Name
439*5113495bSYour Name #if defined(QCA_WIFI_QCA6490) && defined(WLAN_CFR_ENABLE) && \
440*5113495bSYour Name defined(WLAN_ENH_CFR_ENABLE)
441*5113495bSYour Name static inline
hal_rx_get_bb_info_6490(void * rx_tlv,void * ppdu_info_hdl)442*5113495bSYour Name void hal_rx_get_bb_info_6490(void *rx_tlv,
443*5113495bSYour Name void *ppdu_info_hdl)
444*5113495bSYour Name {
445*5113495bSYour Name struct hal_rx_ppdu_info *ppdu_info = ppdu_info_hdl;
446*5113495bSYour Name
447*5113495bSYour Name ppdu_info->cfr_info.bb_captured_channel =
448*5113495bSYour Name HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO_3, BB_CAPTURED_CHANNEL);
449*5113495bSYour Name
450*5113495bSYour Name ppdu_info->cfr_info.bb_captured_timeout =
451*5113495bSYour Name HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO_3, BB_CAPTURED_TIMEOUT);
452*5113495bSYour Name
453*5113495bSYour Name ppdu_info->cfr_info.bb_captured_reason =
454*5113495bSYour Name HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO_3, BB_CAPTURED_REASON);
455*5113495bSYour Name }
456*5113495bSYour Name
457*5113495bSYour Name static inline
hal_rx_get_rtt_info_6490(void * rx_tlv,void * ppdu_info_hdl)458*5113495bSYour Name void hal_rx_get_rtt_info_6490(void *rx_tlv,
459*5113495bSYour Name void *ppdu_info_hdl)
460*5113495bSYour Name {
461*5113495bSYour Name struct hal_rx_ppdu_info *ppdu_info = ppdu_info_hdl;
462*5113495bSYour Name
463*5113495bSYour Name ppdu_info->cfr_info.rx_location_info_valid =
464*5113495bSYour Name HAL_RX_GET(rx_tlv, PHYRX_PKT_END_13_RX_PKT_END_DETAILS,
465*5113495bSYour Name RX_LOCATION_INFO_DETAILS_RX_LOCATION_INFO_VALID);
466*5113495bSYour Name
467*5113495bSYour Name ppdu_info->cfr_info.rtt_che_buffer_pointer_low32 =
468*5113495bSYour Name HAL_RX_GET(rx_tlv,
469*5113495bSYour Name PHYRX_PKT_END_12_RX_PKT_END_DETAILS_RX_LOCATION_INFO_DETAILS,
470*5113495bSYour Name RTT_CHE_BUFFER_POINTER_LOW32);
471*5113495bSYour Name
472*5113495bSYour Name ppdu_info->cfr_info.rtt_che_buffer_pointer_high8 =
473*5113495bSYour Name HAL_RX_GET(rx_tlv,
474*5113495bSYour Name PHYRX_PKT_END_11_RX_PKT_END_DETAILS_RX_LOCATION_INFO_DETAILS,
475*5113495bSYour Name RTT_CHE_BUFFER_POINTER_HIGH8);
476*5113495bSYour Name
477*5113495bSYour Name ppdu_info->cfr_info.chan_capture_status =
478*5113495bSYour Name HAL_RX_GET(rx_tlv,
479*5113495bSYour Name PHYRX_PKT_END_13_RX_PKT_END_DETAILS_RX_LOCATION_INFO_DETAILS,
480*5113495bSYour Name RESERVED_8);
481*5113495bSYour Name ppdu_info->cfr_info.rx_start_ts =
482*5113495bSYour Name HAL_RX_GET(rx_tlv,
483*5113495bSYour Name PHYRX_PKT_END_9_RX_PKT_END_DETAILS_RX_LOCATION_INFO_DETAILS,
484*5113495bSYour Name RX_START_TS);
485*5113495bSYour Name
486*5113495bSYour Name ppdu_info->cfr_info.rtt_cfo_measurement = (int16_t)
487*5113495bSYour Name HAL_RX_GET(rx_tlv,
488*5113495bSYour Name PHYRX_PKT_END_13_RX_PKT_END_DETAILS_RX_LOCATION_INFO_DETAILS,
489*5113495bSYour Name RTT_CFO_MEASUREMENT);
490*5113495bSYour Name
491*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info0 =
492*5113495bSYour Name HAL_RX_GET(rx_tlv,
493*5113495bSYour Name PHYRX_PKT_END_1_RX_PKT_END_DETAILS,
494*5113495bSYour Name PHY_TIMESTAMP_1_LOWER_32);
495*5113495bSYour Name
496*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info1 =
497*5113495bSYour Name HAL_RX_GET(rx_tlv,
498*5113495bSYour Name PHYRX_PKT_END_2_RX_PKT_END_DETAILS,
499*5113495bSYour Name PHY_TIMESTAMP_1_UPPER_32);
500*5113495bSYour Name
501*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info2 =
502*5113495bSYour Name HAL_RX_GET(rx_tlv,
503*5113495bSYour Name PHYRX_PKT_END_3_RX_PKT_END_DETAILS,
504*5113495bSYour Name PHY_TIMESTAMP_2_LOWER_32);
505*5113495bSYour Name
506*5113495bSYour Name ppdu_info->cfr_info.agc_gain_info3 =
507*5113495bSYour Name HAL_RX_GET(rx_tlv,
508*5113495bSYour Name PHYRX_PKT_END_4_RX_PKT_END_DETAILS,
509*5113495bSYour Name PHY_TIMESTAMP_2_UPPER_32);
510*5113495bSYour Name
511*5113495bSYour Name ppdu_info->cfr_info.mcs_rate =
512*5113495bSYour Name HAL_RX_GET(rx_tlv,
513*5113495bSYour Name PHYRX_PKT_END_8_RX_PKT_END_DETAILS_RX_LOCATION_INFO_DETAILS,
514*5113495bSYour Name RTT_MCS_RATE);
515*5113495bSYour Name
516*5113495bSYour Name ppdu_info->cfr_info.gi_type =
517*5113495bSYour Name HAL_RX_GET(rx_tlv,
518*5113495bSYour Name PHYRX_PKT_END_8_RX_PKT_END_DETAILS_RX_LOCATION_INFO_DETAILS,
519*5113495bSYour Name RTT_GI_TYPE);
520*5113495bSYour Name }
521*5113495bSYour Name #endif
522*5113495bSYour Name #endif
523