1 /*
2 * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19 #include "tcl_data_cmd.h"
20 #include "mac_tcl_reg_seq_hwioreg.h"
21 #include "phyrx_rssi_legacy.h"
22 #include "hal_hw_headers.h"
23 #include "hal_internal.h"
24 #include "cdp_txrx_mon_struct.h"
25 #include "qdf_trace.h"
26 #include "hal_rx.h"
27 #include "hal_tx.h"
28 #include "dp_types.h"
29 #include "hal_api_mon.h"
30
31 /**
32 * hal_tx_desc_set_dscp_tid_table_id_6490() - Sets DSCP to TID conversion
33 * table ID
34 * @desc: Handle to Tx Descriptor
35 * @id: DSCP to tid conversion table to be used for this frame
36 *
37 * Return: void
38 */
hal_tx_desc_set_dscp_tid_table_id_6490(void * desc,uint8_t id)39 static void hal_tx_desc_set_dscp_tid_table_id_6490(void *desc, uint8_t id)
40 {
41 HAL_SET_FLD(desc, TCL_DATA_CMD_5,
42 DSCP_TID_TABLE_NUM) |=
43 HAL_TX_SM(TCL_DATA_CMD_5,
44 DSCP_TID_TABLE_NUM, id);
45 }
46
47 #define DSCP_TID_TABLE_SIZE 24
48 #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4)
49
50 /**
51 * hal_tx_set_dscp_tid_map_6490() - Configure default DSCP to TID map table
52 * @hal_soc: HAL SoC context
53 * @map: DSCP-TID mapping table
54 * @id: mapping table ID - 0-31
55 *
56 * DSCP are mapped to 8 TID values using TID values programmed
57 * in any of the 32 DSCP_TID_MAPS (id = 0-31).
58 *
59 * Return: none
60 */
hal_tx_set_dscp_tid_map_6490(struct hal_soc * hal_soc,uint8_t * map,uint8_t id)61 static void hal_tx_set_dscp_tid_map_6490(struct hal_soc *hal_soc, uint8_t *map,
62 uint8_t id)
63 {
64 int i;
65 uint32_t addr, cmn_reg_addr;
66 uint32_t value = 0, regval;
67 uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
68
69 struct hal_soc *soc = (struct hal_soc *)hal_soc;
70
71 if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
72 return;
73
74 cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(
75 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
76
77 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
78 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET,
79 id * NUM_WORDS_PER_DSCP_TID_TABLE);
80
81 /* Enable read/write access */
82 regval = HAL_REG_READ(soc, cmn_reg_addr);
83 regval |=
84 (1 <<
85 HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT);
86
87 HAL_REG_WRITE(soc, cmn_reg_addr, regval);
88
89 /* Write 8 (24 bits) DSCP-TID mappings in each iteration */
90 for (i = 0; i < 64; i += 8) {
91 value = (map[i] |
92 (map[i + 1] << 0x3) |
93 (map[i + 2] << 0x6) |
94 (map[i + 3] << 0x9) |
95 (map[i + 4] << 0xc) |
96 (map[i + 5] << 0xf) |
97 (map[i + 6] << 0x12) |
98 (map[i + 7] << 0x15));
99
100 qdf_mem_copy(&val[cnt], (void *)&value, 3);
101 cnt += 3;
102 }
103
104 for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) {
105 regval = *(uint32_t *)(val + i);
106 HAL_REG_WRITE(soc, addr,
107 (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
108 addr += 4;
109 }
110
111 /* Disable read/write access */
112 regval = HAL_REG_READ(soc, cmn_reg_addr);
113 regval &=
114 ~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK);
115
116 HAL_REG_WRITE(soc, cmn_reg_addr, regval);
117 }
118
119 /**
120 * hal_tx_update_dscp_tid_6490() - Update the dscp tid map table as updated
121 * by the user
122 * @hal_soc: HAL SoC context
123 * @tid: TID
124 * @id: MAP ID
125 * @dscp: DSCP
126 *
127 * Return: void
128 */
hal_tx_update_dscp_tid_6490(struct hal_soc * hal_soc,uint8_t tid,uint8_t id,uint8_t dscp)129 static void hal_tx_update_dscp_tid_6490(struct hal_soc *hal_soc, uint8_t tid,
130 uint8_t id, uint8_t dscp)
131 {
132 int index;
133 uint32_t addr;
134 uint32_t value;
135 uint32_t regval;
136 struct hal_soc *soc = (struct hal_soc *)hal_soc;
137
138 addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
139 SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
140
141 index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
142 addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER);
143 value = tid << (HAL_TX_BITS_PER_TID * index);
144
145 regval = HAL_REG_READ(soc, addr);
146 regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
147 regval |= value;
148
149 HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
150 }
151
152 /**
153 * hal_tx_desc_set_lmac_id_6490() - Set the lmac_id value
154 * @desc: Handle to Tx Descriptor
155 * @lmac_id: mac Id to ast matching
156 * b00 – mac 0
157 * b01 – mac 1
158 * b10 – mac 2
159 * b11 – all macs (legacy HK way)
160 *
161 * Return: void
162 */
hal_tx_desc_set_lmac_id_6490(void * desc,uint8_t lmac_id)163 static void hal_tx_desc_set_lmac_id_6490(void *desc, uint8_t lmac_id)
164 {
165 HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |=
166 HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id);
167 }
168
169 /**
170 * hal_tx_init_cmd_credit_ring_6490() - Initialize command/credit SRNG
171 * @hal_soc_hdl: Handle to HAL SoC structure
172 * @hal_ring_hdl: Handle to HAL SRNG structure
173 *
174 * Return: none
175 */
hal_tx_init_cmd_credit_ring_6490(hal_soc_handle_t hal_soc_hdl,hal_ring_handle_t hal_ring_hdl)176 static inline void hal_tx_init_cmd_credit_ring_6490(hal_soc_handle_t hal_soc_hdl,
177 hal_ring_handle_t hal_ring_hdl)
178 {
179 }
180