xref: /wlan-driver/qca-wifi-host-cmn/hif/src/ar6320def.c (revision 5113495b16420b49004c444715d2daae2066e7dc) !
1 /*
2  * Copyright (c) 2013,2016 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #if defined(AR6320_HEADERS_DEF)
20 #define AR6320 1
21 
22 #define WLAN_HEADERS 1
23 #include "common_drv.h"
24 #include "AR6320/hw/apb_map.h"
25 #include "AR6320/hw/gpio_reg.h"
26 #include "AR6320/hw/rtc_reg.h"
27 #include "AR6320/extra/hw/si_reg.h"
28 #include "AR6320/hw/mbox_reg.h"
29 #include "AR6320/extra/hw/ce_reg_csr.h"
30 #include "AR6320/hw/mbox_wlan_host_reg.h"
31 #include "soc_addrs.h"
32 #include "AR6320/extra/hw/soc_core_reg.h"
33 #include "AR6320/hw/pcie_local_reg.h"
34 #include "AR6320/hw/soc_pcie_reg.h"
35 
36 #ifndef SYSTEM_SLEEP_OFFSET
37 #define SYSTEM_SLEEP_OFFSET     SOC_SYSTEM_SLEEP_OFFSET
38 #endif
39 #ifndef WLAN_SYSTEM_SLEEP_OFFSET
40 #define WLAN_SYSTEM_SLEEP_OFFSET                SOC_SYSTEM_SLEEP_OFFSET
41 #endif
42 #ifndef WLAN_RESET_CONTROL_OFFSET
43 #define WLAN_RESET_CONTROL_OFFSET               SOC_RESET_CONTROL_OFFSET
44 #endif
45 #ifndef RESET_CONTROL_SI0_RST_MASK
46 #define RESET_CONTROL_SI0_RST_MASK              SOC_RESET_CONTROL_SI0_RST_MASK
47 #endif
48 #ifndef SI_BASE_ADDRESS
49 #define SI_BASE_ADDRESS WLAN_SI_BASE_ADDRESS
50 #endif
51 #ifndef PCIE_LOCAL_BASE_ADDRESS
52 /* TBDXXX: Eventually, this Base Address will be defined in HW header files */
53 #define PCIE_LOCAL_BASE_ADDRESS 0x80000
54 #endif
55 #ifndef RTC_STATE_V_ON
56 #define RTC_STATE_V_ON 3
57 #endif
58 
59 #define MY_TARGET_DEF AR6320_TARGETdef
60 #define MY_HOST_DEF AR6320_HOSTdef
61 #define MY_CEREG_DEF AR6320_CE_TARGETdef
62 #define MY_TARGET_BOARD_DATA_SZ AR6320_BOARD_DATA_SZ
63 #define MY_TARGET_BOARD_EXT_DATA_SZ AR6320_BOARD_EXT_DATA_SZ
64 #define DRAM_BASE_ADDRESS TARG_DRAM_START
65 #include "targetdef.h"
66 #include "hostdef.h"
67 #else
68 #include "common_drv.h"
69 #include "targetdef.h"
70 #include "hostdef.h"
71 struct targetdef_s *AR6320_TARGETdef;
72 struct hostdef_s *AR6320_HOSTdef;
73 #endif /* AR6320_HEADERS_DEF */
74