1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name #ifndef _PCI_API_H_ 21*5113495bSYour Name #define _PCI_API_H_ 22*5113495bSYour Name struct hif_exec_context; 23*5113495bSYour Name 24*5113495bSYour Name QDF_STATUS hif_pci_open(struct hif_softc *hif_ctx, 25*5113495bSYour Name enum qdf_bus_type bus_type); 26*5113495bSYour Name void hif_pci_close(struct hif_softc *hif_ctx); 27*5113495bSYour Name void hif_pci_prevent_linkdown(struct hif_softc *scn, bool flag); 28*5113495bSYour Name void hif_pci_reset_soc(struct hif_softc *ol_sc); 29*5113495bSYour Name int hif_pci_bus_suspend(struct hif_softc *scn); 30*5113495bSYour Name int hif_pci_bus_suspend_noirq(struct hif_softc *scn); 31*5113495bSYour Name int hif_pci_bus_resume(struct hif_softc *scn); 32*5113495bSYour Name int hif_pci_bus_resume_noirq(struct hif_softc *scn); 33*5113495bSYour Name int hif_pci_target_sleep_state_adjust(struct hif_softc *scn, 34*5113495bSYour Name bool sleep_ok, bool wait_for_it); 35*5113495bSYour Name 36*5113495bSYour Name void hif_pci_disable_isr(struct hif_softc *scn); 37*5113495bSYour Name void hif_pci_nointrs(struct hif_softc *scn); 38*5113495bSYour Name QDF_STATUS hif_pci_enable_bus(struct hif_softc *scn, 39*5113495bSYour Name struct device *dev, void *bdev, 40*5113495bSYour Name const struct hif_bus_id *bid, 41*5113495bSYour Name enum hif_enable_type type); 42*5113495bSYour Name void hif_pci_disable_bus(struct hif_softc *scn); 43*5113495bSYour Name int hif_pci_bus_configure(struct hif_softc *scn); 44*5113495bSYour Name void hif_pci_irq_disable(struct hif_softc *scn, int ce_id); 45*5113495bSYour Name void hif_pci_irq_enable(struct hif_softc *scn, int ce_id); 46*5113495bSYour Name int hif_pci_dump_registers(struct hif_softc *scn); 47*5113495bSYour Name void hif_pci_enable_power_management(struct hif_softc *hif_ctx, 48*5113495bSYour Name bool is_packet_log_enabled); 49*5113495bSYour Name void hif_pci_disable_power_management(struct hif_softc *hif_ctx); 50*5113495bSYour Name int hif_pci_configure_grp_irq(struct hif_softc *scn, 51*5113495bSYour Name struct hif_exec_context *exec); 52*5113495bSYour Name void hif_pci_deconfigure_grp_irq(struct hif_softc *scn); 53*5113495bSYour Name 54*5113495bSYour Name /** 55*5113495bSYour Name * hif_pci_reg_read32() - Read register in 32bits 56*5113495bSYour Name * @hif_sc: PCIe control struct 57*5113495bSYour Name * @offset: The register offset 58*5113495bSYour Name * 59*5113495bSYour Name * This function will read register in 32bits 60*5113495bSYour Name * 61*5113495bSYour Name * Return: return value for register with specified offset 62*5113495bSYour Name */ 63*5113495bSYour Name uint32_t hif_pci_reg_read32(struct hif_softc *hif_sc, 64*5113495bSYour Name uint32_t offset); 65*5113495bSYour Name 66*5113495bSYour Name /** 67*5113495bSYour Name * hif_pci_reg_write32() - Write register in 32bits 68*5113495bSYour Name * @hif_sc: PCIe control struct 69*5113495bSYour Name * @offset: The register offset 70*5113495bSYour Name * @value: The value need to be written 71*5113495bSYour Name * 72*5113495bSYour Name * This function will write register in 32bits 73*5113495bSYour Name * 74*5113495bSYour Name * Return: None 75*5113495bSYour Name */ 76*5113495bSYour Name void hif_pci_reg_write32(struct hif_softc *hif_sc, 77*5113495bSYour Name uint32_t offset, 78*5113495bSYour Name uint32_t value); 79*5113495bSYour Name 80*5113495bSYour Name void hif_pci_display_stats(struct hif_softc *hif_ctx); 81*5113495bSYour Name void hif_pci_clear_stats(struct hif_softc *hif_ctx); 82*5113495bSYour Name int hif_pci_legacy_map_ce_to_irq(struct hif_softc *scn, int ce_id); 83*5113495bSYour Name bool hif_pci_needs_bmi(struct hif_softc *scn); 84*5113495bSYour Name const char *hif_pci_get_irq_name(int irq_no); 85*5113495bSYour Name 86*5113495bSYour Name /** hif_pci_config_irq_affinity() - Set the IRQ affinity 87*5113495bSYour Name * @scn: hif context 88*5113495bSYour Name * 89*5113495bSYour Name * Set IRQ affinity hint for WLAN IRQs to gold cores only for 90*5113495bSYour Name * defconfig builds. 91*5113495bSYour Name * 92*5113495bSYour Name * Return: None 93*5113495bSYour Name */ 94*5113495bSYour Name void hif_pci_config_irq_affinity(struct hif_softc *scn); 95*5113495bSYour Name int hif_ce_msi_configure_irq_by_ceid(struct hif_softc *scn, int ce_id); 96*5113495bSYour Name 97*5113495bSYour Name #ifdef FEATURE_IRQ_AFFINITY 98*5113495bSYour Name /* 99*5113495bSYour Name * hif_pci_set_grp_intr_affinity() - Set irq affinity hint for grp 100*5113495bSYour Name * intrs based on bitmask 101*5113495bSYour Name * @scn: hif context 102*5113495bSYour Name * @grp_intr_bitmask: 103*5113495bSYour Name * @perf: affine to perf or non-perf cluster 104*5113495bSYour Name * 105*5113495bSYour Name * Return: None 106*5113495bSYour Name */ 107*5113495bSYour Name void hif_pci_set_grp_intr_affinity(struct hif_softc *scn, 108*5113495bSYour Name uint32_t grp_intr_bitmask, bool perf); 109*5113495bSYour Name #endif 110*5113495bSYour Name #endif /* _PCI_API_H_ */ 111