xref: /wlan-driver/qca-wifi-host-cmn/hif/src/pcie/hif_io32_pci.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef __HIF_IO32_PCI_H__
21 #define __HIF_IO32_PCI_H__
22 
23 #ifdef HIF_PCI
24 
25 #include "hif_main.h"
26 #include "regtable.h"
27 #include "ce_reg.h"
28 #include "qdf_atomic.h"
29 #include "if_pci.h"
30 /*
31  * For maximum performance and no power management, set this to 1.
32  * For power management at the cost of performance, set this to 0.
33  */
34 #ifndef CONFIG_ATH_PCIE_MAX_PERF
35 #define CONFIG_ATH_PCIE_MAX_PERF 0
36 #endif
37 
38 /*
39  * For keeping the target awake till the driver is
40  * loaded, set this to 1
41  */
42 #ifndef CONFIG_ATH_PCIE_AWAKE_WHILE_DRIVER_LOAD
43 #define CONFIG_ATH_PCIE_AWAKE_WHILE_DRIVER_LOAD 1
44 #endif
45 
46 /*
47  * PCI-E L1 ASPPM sub-states
48  * To enable clock gating in L1 state, set this to 1.
49  * (less power, slightly more wakeup latency)
50  * To disable clock gating in L1 state, set this to 0. (slightly more power)
51  */
52 #define CONFIG_PCIE_ENABLE_L1_CLOCK_GATE 1
53 
54 /*
55  * PCIE_ACCESS_LOG_NUM specifies the number of
56  * read/write records to store
57  */
58 #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
59 #define PCIE_ACCESS_LOG_NUM 500
60 #endif
61 
62 /* 64-bit MSI support */
63 #define CONFIG_PCIE_64BIT_MSI 0
64 
65 /* BAR0 ready checking for AR6320v2 */
66 #define PCIE_BAR0_READY_CHECKING 0
67 
68 /* AXI gating when L1, L2 to reduce power consumption */
69 #define CONFIG_PCIE_ENABLE_AXI_CLK_GATE 0
70 
71 irqreturn_t hif_fw_interrupt_handler(int irq, void *arg);
72 #endif /* HIF_PCI */
73 #endif /* __HIF_IO32_PCI_H__ */
74