xref: /wlan-driver/qca-wifi-host-cmn/hif/src/qcn9160def.c (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3*5113495bSYour Name  * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name  *
5*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
6*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
7*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
8*5113495bSYour Name  *
9*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16*5113495bSYour Name  */
17*5113495bSYour Name 
18*5113495bSYour Name #if defined(QCN9160_HEADERS_DEF)
19*5113495bSYour Name 
20*5113495bSYour Name #undef UMAC
21*5113495bSYour Name #define WLAN_HEADERS 1
22*5113495bSYour Name #include "lithium_top_reg.h"
23*5113495bSYour Name #include "wfss_ce_reg_seq_hwioreg.h"
24*5113495bSYour Name #include "wcss_version.h"
25*5113495bSYour Name 
26*5113495bSYour Name #define MISSING 0
27*5113495bSYour Name 
28*5113495bSYour Name #define SOC_RESET_CONTROL_OFFSET MISSING
29*5113495bSYour Name #define GPIO_PIN0_OFFSET                        MISSING
30*5113495bSYour Name #define GPIO_PIN1_OFFSET                        MISSING
31*5113495bSYour Name #define GPIO_PIN0_CONFIG_MASK                   MISSING
32*5113495bSYour Name #define GPIO_PIN1_CONFIG_MASK                   MISSING
33*5113495bSYour Name #define LOCAL_SCRATCH_OFFSET 0x18
34*5113495bSYour Name #define GPIO_PIN10_OFFSET MISSING
35*5113495bSYour Name #define GPIO_PIN11_OFFSET MISSING
36*5113495bSYour Name #define GPIO_PIN12_OFFSET MISSING
37*5113495bSYour Name #define GPIO_PIN13_OFFSET MISSING
38*5113495bSYour Name #define MBOX_BASE_ADDRESS MISSING
39*5113495bSYour Name #define INT_STATUS_ENABLE_ERROR_LSB MISSING
40*5113495bSYour Name #define INT_STATUS_ENABLE_ERROR_MASK MISSING
41*5113495bSYour Name #define INT_STATUS_ENABLE_CPU_LSB MISSING
42*5113495bSYour Name #define INT_STATUS_ENABLE_CPU_MASK MISSING
43*5113495bSYour Name #define INT_STATUS_ENABLE_COUNTER_LSB MISSING
44*5113495bSYour Name #define INT_STATUS_ENABLE_COUNTER_MASK MISSING
45*5113495bSYour Name #define INT_STATUS_ENABLE_MBOX_DATA_LSB MISSING
46*5113495bSYour Name #define INT_STATUS_ENABLE_MBOX_DATA_MASK MISSING
47*5113495bSYour Name #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB MISSING
48*5113495bSYour Name #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK MISSING
49*5113495bSYour Name #define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB MISSING
50*5113495bSYour Name #define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK MISSING
51*5113495bSYour Name #define COUNTER_INT_STATUS_ENABLE_BIT_LSB MISSING
52*5113495bSYour Name #define COUNTER_INT_STATUS_ENABLE_BIT_MASK MISSING
53*5113495bSYour Name #define INT_STATUS_ENABLE_ADDRESS MISSING
54*5113495bSYour Name #define CPU_INT_STATUS_ENABLE_BIT_LSB MISSING
55*5113495bSYour Name #define CPU_INT_STATUS_ENABLE_BIT_MASK MISSING
56*5113495bSYour Name #define HOST_INT_STATUS_ADDRESS MISSING
57*5113495bSYour Name #define CPU_INT_STATUS_ADDRESS MISSING
58*5113495bSYour Name #define ERROR_INT_STATUS_ADDRESS MISSING
59*5113495bSYour Name #define ERROR_INT_STATUS_WAKEUP_MASK MISSING
60*5113495bSYour Name #define ERROR_INT_STATUS_WAKEUP_LSB MISSING
61*5113495bSYour Name #define ERROR_INT_STATUS_RX_UNDERFLOW_MASK MISSING
62*5113495bSYour Name #define ERROR_INT_STATUS_RX_UNDERFLOW_LSB MISSING
63*5113495bSYour Name #define ERROR_INT_STATUS_TX_OVERFLOW_MASK MISSING
64*5113495bSYour Name #define ERROR_INT_STATUS_TX_OVERFLOW_LSB MISSING
65*5113495bSYour Name #define COUNT_DEC_ADDRESS MISSING
66*5113495bSYour Name #define HOST_INT_STATUS_CPU_MASK MISSING
67*5113495bSYour Name #define HOST_INT_STATUS_CPU_LSB MISSING
68*5113495bSYour Name #define HOST_INT_STATUS_ERROR_MASK MISSING
69*5113495bSYour Name #define HOST_INT_STATUS_ERROR_LSB MISSING
70*5113495bSYour Name #define HOST_INT_STATUS_COUNTER_MASK MISSING
71*5113495bSYour Name #define HOST_INT_STATUS_COUNTER_LSB MISSING
72*5113495bSYour Name #define RX_LOOKAHEAD_VALID_ADDRESS MISSING
73*5113495bSYour Name #define WINDOW_DATA_ADDRESS MISSING
74*5113495bSYour Name #define WINDOW_READ_ADDR_ADDRESS MISSING
75*5113495bSYour Name #define WINDOW_WRITE_ADDR_ADDRESS MISSING
76*5113495bSYour Name /* GPIO Register */
77*5113495bSYour Name #define GPIO_ENABLE_W1TS_LOW_ADDRESS            MISSING
78*5113495bSYour Name #define GPIO_PIN0_CONFIG_LSB                    MISSING
79*5113495bSYour Name #define GPIO_PIN0_PAD_PULL_LSB                  MISSING
80*5113495bSYour Name #define GPIO_PIN0_PAD_PULL_MASK                 MISSING
81*5113495bSYour Name /* SI reg */
82*5113495bSYour Name #define SI_CONFIG_ERR_INT_MASK                  MISSING
83*5113495bSYour Name #define SI_CONFIG_ERR_INT_LSB                   MISSING
84*5113495bSYour Name 
85*5113495bSYour Name #define RTC_SOC_BASE_ADDRESS MISSING
86*5113495bSYour Name #define RTC_WMAC_BASE_ADDRESS MISSING
87*5113495bSYour Name #define SOC_CORE_BASE_ADDRESS MISSING
88*5113495bSYour Name #define WLAN_MAC_BASE_ADDRESS MISSING
89*5113495bSYour Name #define GPIO_BASE_ADDRESS MISSING
90*5113495bSYour Name #define ANALOG_INTF_BASE_ADDRESS MISSING
91*5113495bSYour Name #define CE0_BASE_ADDRESS MISSING
92*5113495bSYour Name #define CE1_BASE_ADDRESS MISSING
93*5113495bSYour Name #define CE_COUNT		12
94*5113495bSYour Name #define CE_WRAPPER_BASE_ADDRESS MISSING
95*5113495bSYour Name #define SI_BASE_ADDRESS MISSING
96*5113495bSYour Name #define DRAM_BASE_ADDRESS MISSING
97*5113495bSYour Name 
98*5113495bSYour Name #define WLAN_SYSTEM_SLEEP_DISABLE_LSB MISSING
99*5113495bSYour Name #define WLAN_SYSTEM_SLEEP_DISABLE_MASK MISSING
100*5113495bSYour Name #define CLOCK_CONTROL_OFFSET MISSING
101*5113495bSYour Name #define CLOCK_CONTROL_SI0_CLK_MASK MISSING
102*5113495bSYour Name #define RESET_CONTROL_SI0_RST_MASK MISSING
103*5113495bSYour Name #define WLAN_RESET_CONTROL_OFFSET MISSING
104*5113495bSYour Name #define WLAN_RESET_CONTROL_COLD_RST_MASK MISSING
105*5113495bSYour Name #define WLAN_RESET_CONTROL_WARM_RST_MASK MISSING
106*5113495bSYour Name #define CPU_CLOCK_OFFSET MISSING
107*5113495bSYour Name 
108*5113495bSYour Name #define CPU_CLOCK_STANDARD_LSB MISSING
109*5113495bSYour Name #define CPU_CLOCK_STANDARD_MASK MISSING
110*5113495bSYour Name #define LPO_CAL_ENABLE_LSB MISSING
111*5113495bSYour Name #define LPO_CAL_ENABLE_MASK MISSING
112*5113495bSYour Name #define WLAN_SYSTEM_SLEEP_OFFSET MISSING
113*5113495bSYour Name 
114*5113495bSYour Name #define SOC_CHIP_ID_ADDRESS	  MISSING
115*5113495bSYour Name #define SOC_CHIP_ID_REVISION_MASK MISSING
116*5113495bSYour Name #define SOC_CHIP_ID_REVISION_LSB  MISSING
117*5113495bSYour Name #define SOC_CHIP_ID_REVISION_MSB  MISSING
118*5113495bSYour Name 
119*5113495bSYour Name #define FW_IND_EVENT_PENDING MISSING
120*5113495bSYour Name #define FW_IND_INITIALIZED MISSING
121*5113495bSYour Name 
122*5113495bSYour Name #define MSDU_LINK_EXT_3_TCP_OVER_IPV4_CHECKSUM_EN_MASK MISSING
123*5113495bSYour Name #define MSDU_LINK_EXT_3_TCP_OVER_IPV6_CHECKSUM_EN_MASK MISSING
124*5113495bSYour Name #define MSDU_LINK_EXT_3_UDP_OVER_IPV4_CHECKSUM_EN_MASK MISSING
125*5113495bSYour Name #define MSDU_LINK_EXT_3_UDP_OVER_IPV6_CHECKSUM_EN_MASK MISSING
126*5113495bSYour Name #define MSDU_LINK_EXT_3_TCP_OVER_IPV4_CHECKSUM_EN_LSB  MISSING
127*5113495bSYour Name #define MSDU_LINK_EXT_3_TCP_OVER_IPV6_CHECKSUM_EN_LSB  MISSING
128*5113495bSYour Name #define MSDU_LINK_EXT_3_UDP_OVER_IPV4_CHECKSUM_EN_LSB  MISSING
129*5113495bSYour Name #define MSDU_LINK_EXT_3_UDP_OVER_IPV6_CHECKSUM_EN_LSB  MISSING
130*5113495bSYour Name 
131*5113495bSYour Name #define SR_WR_INDEX_ADDRESS MISSING
132*5113495bSYour Name #define DST_WATERMARK_ADDRESS MISSING
133*5113495bSYour Name 
134*5113495bSYour Name #define DST_WR_INDEX_ADDRESS MISSING
135*5113495bSYour Name #define SRC_WATERMARK_ADDRESS MISSING
136*5113495bSYour Name #define SRC_WATERMARK_LOW_MASK MISSING
137*5113495bSYour Name #define SRC_WATERMARK_HIGH_MASK MISSING
138*5113495bSYour Name #define DST_WATERMARK_LOW_MASK MISSING
139*5113495bSYour Name #define DST_WATERMARK_HIGH_MASK MISSING
140*5113495bSYour Name #define CURRENT_SRRI_ADDRESS MISSING
141*5113495bSYour Name #define CURRENT_DRRI_ADDRESS MISSING
142*5113495bSYour Name #define HOST_IS_SRC_RING_HIGH_WATERMARK_MASK MISSING
143*5113495bSYour Name #define HOST_IS_SRC_RING_LOW_WATERMARK_MASK MISSING
144*5113495bSYour Name #define HOST_IS_DST_RING_HIGH_WATERMARK_MASK MISSING
145*5113495bSYour Name #define HOST_IS_DST_RING_LOW_WATERMARK_MASK MISSING
146*5113495bSYour Name #define HOST_IS_ADDRESS MISSING
147*5113495bSYour Name #define MISC_IS_ADDRESS MISSING
148*5113495bSYour Name #define HOST_IS_COPY_COMPLETE_MASK MISSING
149*5113495bSYour Name #define CE_WRAPPER_BASE_ADDRESS MISSING
150*5113495bSYour Name #define CE_WRAPPER_INTERRUPT_SUMMARY_ADDRESS MISSING
151*5113495bSYour Name #define CE_DDR_ADDRESS_FOR_RRI_LOW MISSING
152*5113495bSYour Name #define CE_DDR_ADDRESS_FOR_RRI_HIGH MISSING
153*5113495bSYour Name 
154*5113495bSYour Name #define HOST_IE_ADDRESS \
155*5113495bSYour Name 	HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR
156*5113495bSYour Name #define HOST_IE_ADDRESS_2 \
157*5113495bSYour Name 	HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR
158*5113495bSYour Name 
159*5113495bSYour Name #define HOST_IE_COPY_COMPLETE_MASK MISSING
160*5113495bSYour Name #define SR_BA_ADDRESS MISSING
161*5113495bSYour Name #define SR_BA_ADDRESS_HIGH MISSING
162*5113495bSYour Name #define SR_SIZE_ADDRESS MISSING
163*5113495bSYour Name #define CE_CTRL1_ADDRESS MISSING
164*5113495bSYour Name #define CE_CTRL1_DMAX_LENGTH_MASK MISSING
165*5113495bSYour Name #define DR_BA_ADDRESS MISSING
166*5113495bSYour Name #define DR_BA_ADDRESS_HIGH MISSING
167*5113495bSYour Name #define DR_SIZE_ADDRESS MISSING
168*5113495bSYour Name #define CE_CMD_REGISTER MISSING
169*5113495bSYour Name #define CE_MSI_ADDRESS MISSING
170*5113495bSYour Name #define CE_MSI_ADDRESS_HIGH MISSING
171*5113495bSYour Name #define CE_MSI_DATA MISSING
172*5113495bSYour Name #define CE_MSI_ENABLE_BIT MISSING
173*5113495bSYour Name #define MISC_IE_ADDRESS MISSING
174*5113495bSYour Name #define MISC_IS_AXI_ERR_MASK MISSING
175*5113495bSYour Name #define MISC_IS_DST_ADDR_ERR_MASK MISSING
176*5113495bSYour Name #define MISC_IS_SRC_LEN_ERR_MASK MISSING
177*5113495bSYour Name #define MISC_IS_DST_MAX_LEN_VIO_MASK MISSING
178*5113495bSYour Name #define MISC_IS_DST_RING_OVERFLOW_MASK MISSING
179*5113495bSYour Name #define MISC_IS_SRC_RING_OVERFLOW_MASK MISSING
180*5113495bSYour Name #define SRC_WATERMARK_LOW_LSB MISSING
181*5113495bSYour Name #define SRC_WATERMARK_HIGH_LSB MISSING
182*5113495bSYour Name #define DST_WATERMARK_LOW_LSB MISSING
183*5113495bSYour Name #define DST_WATERMARK_HIGH_LSB MISSING
184*5113495bSYour Name #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_MASK MISSING
185*5113495bSYour Name #define CE_WRAPPER_INTERRUPT_SUMMARY_HOST_MSI_LSB MISSING
186*5113495bSYour Name #define CE_CTRL1_DMAX_LENGTH_LSB MISSING
187*5113495bSYour Name #define CE_CTRL1_SRC_RING_BYTE_SWAP_EN_MASK MISSING
188*5113495bSYour Name #define CE_CTRL1_DST_RING_BYTE_SWAP_EN_MASK MISSING
189*5113495bSYour Name #define CE_CTRL1_SRC_RING_BYTE_SWAP_EN_LSB MISSING
190*5113495bSYour Name #define CE_CTRL1_DST_RING_BYTE_SWAP_EN_LSB MISSING
191*5113495bSYour Name #define CE_CTRL1_IDX_UPD_EN_MASK MISSING
192*5113495bSYour Name #define CE_WRAPPER_DEBUG_OFFSET MISSING
193*5113495bSYour Name #define CE_WRAPPER_DEBUG_SEL_MSB MISSING
194*5113495bSYour Name #define CE_WRAPPER_DEBUG_SEL_LSB MISSING
195*5113495bSYour Name #define CE_WRAPPER_DEBUG_SEL_MASK MISSING
196*5113495bSYour Name #define CE_DEBUG_OFFSET MISSING
197*5113495bSYour Name #define CE_DEBUG_SEL_MSB MISSING
198*5113495bSYour Name #define CE_DEBUG_SEL_LSB MISSING
199*5113495bSYour Name #define CE_DEBUG_SEL_MASK MISSING
200*5113495bSYour Name #define CE0_BASE_ADDRESS MISSING
201*5113495bSYour Name #define CE1_BASE_ADDRESS MISSING
202*5113495bSYour Name #define A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_ENABLES MISSING
203*5113495bSYour Name #define A_WIFI_APB_3_A_WCMN_APPS_CE_INTR_STATUS MISSING
204*5113495bSYour Name 
205*5113495bSYour Name #define QCN9160_BOARD_DATA_SZ MISSING
206*5113495bSYour Name #define QCN9160_BOARD_EXT_DATA_SZ MISSING
207*5113495bSYour Name 
208*5113495bSYour Name #define MY_TARGET_DEF QCN9160_TARGETDEF
209*5113495bSYour Name #define MY_HOST_DEF QCN9160_HOSTDEF
210*5113495bSYour Name #define MY_CEREG_DEF QCN9160_CE_TARGETDEF
211*5113495bSYour Name #define MY_TARGET_BOARD_DATA_SZ QCN9160_BOARD_DATA_SZ
212*5113495bSYour Name #define MY_TARGET_BOARD_EXT_DATA_SZ QCN9160_BOARD_EXT_DATA_SZ
213*5113495bSYour Name #include "targetdef.h"
214*5113495bSYour Name #include "hostdef.h"
215*5113495bSYour Name #else
216*5113495bSYour Name #include "common_drv.h"
217*5113495bSYour Name #include "targetdef.h"
218*5113495bSYour Name #include "hostdef.h"
219*5113495bSYour Name struct targetdef_s *QCN9160_TARGETDEF;
220*5113495bSYour Name struct hostdef_s *QCN9160_HOSTDEF;
221*5113495bSYour Name #endif /*QCN9160_HEADERS_DEF */
222