xref: /wlan-driver/qca-wifi-host-cmn/target_if/spectral/target_if_spectral_sim_int.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2015,2017-2020 The Linux Foundation. All rights reserved.
3  *
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef _SPECTRAL_SIM_INTERNAL_H_
21 #define _SPECTRAL_SIM_INTERNAL_H_
22 
23 #ifdef QCA_SUPPORT_SPECTRAL_SIMULATION
24 #include "target_if_spectral.h"
25 
26 /* #define SPECTRAL_SIM_DUMP_PARAM_DATA 1 */
27 /**
28  * struct spectralsim_report - Linked list node of spectal simulation report
29  * Spectral report data instance. Usable in a linked list.
30  * In the case of Direct Attach chipsets, one instance should correspond to
31  * one PHY Data Error frame received from the HW.
32  * XXX Direct Attach support to be implemented if needed. Any modifications
33  * required here can be made at the time of implementation.
34  * In the case of 802.11ac offload chipsets, one instance should correspond to
35  * one report received from HW, inclusive of all TLVs.
36  *
37  * @rfqual_info: RF measurement information
38  * @chan_info: Channel information
39  * @datasize: Length of report data
40  * @data: Pointer to report data
41  * @next: Pointer to next node in the struct spectralsim_report
42  */
43 struct spectralsim_report {
44 	/* 11ac onwards only */
45 	struct target_if_spectral_rfqual_info rfqual_info;
46 	/* 11ac onwards only */
47 	struct target_if_spectral_chan_info chan_info;
48 	uint32_t datasize;
49 	uint8_t *data;
50 	struct spectralsim_report *next;
51 };
52 
53 /**
54  * struct spectralsim_reportset - Set of Spectral report data instances
55  * corresponding to one particular configuration. Usable in a linked list.
56  * @config: Spectral config parameters
57  * @headreport: Pointer to the linked list of struct spectralsim_report
58  * @curr_report: Pointer to current node in the linked list of
59  * struct spectralsim_report
60  * @next: Pointer to next node in the struct spectralsim_reportset
61  */
62 struct spectralsim_reportset {
63 	struct spectral_config config;
64 	struct spectralsim_report *headreport;
65 	struct spectralsim_report *curr_report;
66 	struct spectralsim_reportset *next;
67 };
68 
69 /*
70  * struct spectralsim_context - Main structure for Spectral simulation.
71  * All data and controls get linked here.
72  *
73  * For each width (20/40/80/160/80+80), we will have a linked list of
74  * spectralsim_reportset nodes. Each struct spectralsim_reportset will have a
75  * linked list of struct spectralsim_report nodes. When the user requests for a
76  * given PHY mode and Spectral configuration, we find the appropriate
77  * spectralsim_reportset, and then serve struct spectralsim_report instances
78  * from the linked list. If required report count is higher than size of linked
79  * list (or infinite), we repeatedly cycle through the linked list.  There can
80  * be more elaborate data structures devised taking care of a large number of
81  * possibilities, but we stick to a simple scheme given limited simulation
82  * needs.
83  *
84  * @bw20_headreportset : Linked list of spectralsim_reportset for 20MHz width
85  * @bw20_headreportset : Linked list of spectralsim_reportset for 40MHz width
86  * @bw20_headreportset : Linked list of spectralsim_reportset for 80MHz width
87  * @bw20_headreportset : Linked list of spectralsim_reportset for 160MHz width
88  * @bw20_headreportset : Linked list of spectralsim_reportset for 80_80MHz width
89  * @curr_reportset : Pointer to current node in the linked list of
90  * struct spectralsim_reportset
91  * @is_enabled : Whether the simulated spectral scan is set as enabled
92  * @is_active : Whether the simulated spectral scan is set as active
93  * @ssim_pherrdelivery_timer : Simulated Phyerr delivery timer
94  * @ssim_starting_tsf64 : Starting 64-bit TSF value for spectral simulation
95  * @ssim_period_ms : Simulated Phyerr delivery period in ms
96  * @ssim_count : Number of simulated spectral samples to deliver
97  * @populate_report_static : Pointer to function to populate static spectral
98  * report data
99  */
100 struct spectralsim_context {
101 	struct spectralsim_reportset *bw20_headreportset;
102 	struct spectralsim_reportset *bw40_headreportset;
103 	struct spectralsim_reportset *bw80_headreportset;
104 	struct spectralsim_reportset *bw160_headreportset;
105 	struct spectralsim_reportset *bw80_80_headreportset;
106 
107 	struct spectralsim_reportset *curr_reportset;
108 	bool is_enabled;
109 	bool is_active;
110 
111 	qdf_timer_t ssim_pherrdelivery_timer;
112 	uint64_t ssim_starting_tsf64;
113 	uint32_t ssim_period_ms;	/* TODO: Support in microseconds */
114 	uint32_t ssim_count;
115 	int (*populate_report_static)(struct spectralsim_report *report,
116 				      enum phy_ch_width width, bool is_80_80);
117 };
118 
119 /* Helper Macros */
120 
121 /* Allocate and populate reportset for a single configuration */
122 #define SPECTRAL_SIM_REPORTSET_ALLOCPOPL_SINGLE(simctx, reportset, width) \
123 	do {                                                                 \
124 	(reportset) = (struct spectralsim_reportset *)                       \
125 		qdf_mem_malloc(sizeof(struct spectralsim_reportset));        \
126 									  \
127 	if ((reportset) == NULL) {                                        \
128 		target_if_depopulate_simdata((simctx));                     \
129 		return -EPERM;                                              \
130 	}                                                                 \
131 									  \
132 	qdf_mem_zero((reportset), sizeof(struct spectralsim_reportset));     \
133 									  \
134 	if (target_if_populate_reportset_static( \
135 		(simctx), (reportset), (width)) != 0) { \
136 		target_if_depopulate_simdata((simctx));        \
137 		return -EPERM;                                 \
138 	}                                                                 \
139 									  \
140 	(reportset)->next = NULL;                                         \
141 	} while (0)
142 
143 /* Depopulate and free list of report sets */
144 #define SPECTRAL_SIM_REPORTSET_DEPOPLFREE_LIST(reportset)                 \
145 	{                                                                 \
146 	struct spectralsim_reportset *curr_reportset = NULL;                 \
147 	struct spectralsim_reportset *next_reportset = NULL;                 \
148 									\
149 	curr_reportset = (reportset);                                   \
150 									\
151 	while (curr_reportset) {                                        \
152 		next_reportset = curr_reportset->next;                  \
153 		target_if_depopulate_reportset(curr_reportset);         \
154 		qdf_mem_free(curr_reportset);                           \
155 		curr_reportset = next_reportset;                        \
156 	}                                                               \
157 									\
158 	(reportset) = NULL;                                             \
159 	}
160 
161 /* Values for static population */
162 
163 /* 20 MHz */
164 
165 /* Report data for 20MHz bandwidth for generation 2 chipsets */
166 static uint8_t reportdata_20_gen2[] = {
167 #ifdef BIG_ENDIAN_HOST
168 	0xbb,			/* Signature */
169 	0xfb,			/* Tag */
170 	0x00,			/* Size */
171 	0x54,
172 	0x2e, 0x60, 0x0f, 0xe8,	/* FFT Summary A */
173 	0x00, 0x00, 0x04, 0x00,	/* FFT Summary B */
174 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
175 #else
176 	0x54,			/* Length */
177 	0x00,
178 	0xfb,			/* Tag */
179 	0xbb,			/* Signature */
180 	0xe8, 0x0f, 0x60, 0x2e,	/* FFT Summary A */
181 	0x00, 0x04, 0x00, 0x00,	/* FFT Summary B */
182 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
183 #endif				/* BIG_ENDIAN_HOST */
184 	/* FFT Data */
185 	1, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 1, 2, 0, 1, 1, 1, 0,
186 	0, 1, 1, 0, 0, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, 1, 1,
187 	1, 1, 0, 2, 1, 2, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0,
188 };
189 
190 /* Report data for 20MHz bandwidth for generation 3 chipsets */
191 static uint8_t reportdata_20_gen3[] = {
192 #ifdef BIG_ENDIAN_HOST
193 	0x12, 0x34, 0x56, 0x78,	/* fft_timestamp */
194 	0xfa,			/* fft_hdr_sig */
195 	0x03,			/* fft_hdr_tag */
196 	0x00,			/* fft_hdr_length */
197 	0x14,
198 	0x0f, 0xf6, 0x00, 0xe0,
199 	0x00, 0x00, 0x2f, 0xba,
200 	0x20, 0xb4, 0x2c, 0x01,
201 	0x00, 0x00, 0x00, 0x00,	/* reserved */
202 #else
203 	0x78, 0x56, 0x34, 0x12,	/* fft_timestamp */
204 	0x14,			/* fft_hdr_length */
205 	0x00,
206 	0x03,			/* fft_hdr_tag */
207 	0xfa,			/* fft_hdr_sig */
208 	0xe0, 0x00, 0xf6, 0x0f,
209 	0xba, 0x2f, 0x00, 0x00,
210 	0x01, 0x2c, 0xb4, 0x20,
211 	0x00, 0x00, 0x00, 0x00,	/* reserved */
212 #endif				/* BIG_ENDIAN_HOST */
213 	/* FFT Data */
214 	1, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 1, 2, 0, 1, 1, 1, 0,
215 	0, 1, 1, 0, 0, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, 1, 1,
216 	1, 1, 0, 2, 1, 2, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0,
217 };
218 
219 /* RF measurement information for 20 MHz bandwidth */
220 static struct target_if_spectral_rfqual_info rfqual_info_20 = {
221 	.rssi_comb = 1,
222 
223 	.pc_rssi_info[0].rssi_pri20 = 1,
224 	.pc_rssi_info[0].rssi_sec20 = 128,
225 	.pc_rssi_info[0].rssi_sec40 = 128,
226 	.pc_rssi_info[0].rssi_sec80 = 128,
227 
228 	.pc_rssi_info[1].rssi_pri20 = 128,
229 	.pc_rssi_info[1].rssi_sec20 = 128,
230 	.pc_rssi_info[1].rssi_sec40 = 128,
231 	.pc_rssi_info[1].rssi_sec80 = 128,
232 
233 	.pc_rssi_info[2].rssi_pri20 = 128,
234 	.pc_rssi_info[2].rssi_sec20 = 128,
235 	.pc_rssi_info[2].rssi_sec40 = 128,
236 	.pc_rssi_info[2].rssi_sec80 = 128,
237 
238 	.pc_rssi_info[3].rssi_pri20 = 128,
239 	.pc_rssi_info[3].rssi_sec20 = 128,
240 	.pc_rssi_info[3].rssi_sec40 = 128,
241 	.pc_rssi_info[3].rssi_sec80 = 128,
242 
243 	.noise_floor[0] = -90,
244 	.noise_floor[1] = -90,
245 	.noise_floor[2] = -90,
246 	.noise_floor[3] = -90,
247 };
248 
249 /* Channel information for 20 MHz bandwidth */
250 static struct target_if_spectral_chan_info chan_info_20 = {
251 	.center_freq1 = 5180,
252 	.center_freq2 = 0,
253 	.chan_width = 20,
254 };
255 
256 /* Spectral config parameters for 20 MHz bandwidth */
257 static struct spectral_config config_20_1 = {
258 	.ss_fft_period = 1,
259 	.ss_period = 35,
260 	.ss_count = 0,
261 	.ss_short_report = 1,
262 	.radar_bin_thresh_sel = 0,
263 	.ss_spectral_pri = 1,
264 	.ss_fft_size = 7,
265 	.ss_gc_ena = 1,
266 	.ss_restart_ena = 0,
267 	.ss_noise_floor_ref = 65440,
268 	.ss_init_delay = 80,
269 	.ss_nb_tone_thr = 12,
270 	.ss_str_bin_thr = 8,
271 	.ss_wb_rpt_mode = 0,
272 	.ss_rssi_rpt_mode = 0,
273 	.ss_rssi_thr = 240,
274 	.ss_pwr_format = 0,
275 	.ss_rpt_mode = 2,
276 	.ss_bin_scale = 1,
277 	.ss_dbm_adj = 1,
278 	.ss_chn_mask = 1,
279 	.ss_nf_cal[0] = 0,
280 	.ss_nf_cal[1] = 0,
281 	.ss_nf_cal[2] = 0,
282 	.ss_nf_cal[3] = 0,
283 	.ss_nf_cal[4] = 0,
284 	.ss_nf_cal[5] = 0,
285 	.ss_nf_pwr[0] = 0,
286 	.ss_nf_pwr[1] = 0,
287 	.ss_nf_pwr[2] = 0,
288 	.ss_nf_pwr[3] = 0,
289 	.ss_nf_pwr[4] = 0,
290 	.ss_nf_pwr[5] = 0,
291 	.ss_nf_temp_data = 0,
292 };
293 
294 /* 40 MHz */
295 
296 /* Report data for 40MHz bandwidth for generation 2 chipsets */
297 static uint8_t reportdata_40_gen2[] = {
298 #ifdef BIG_ENDIAN_HOST
299 	0xbb,			/* Signature */
300 	0xfb,			/* Tag */
301 	0x00,			/* Size */
302 	0x94,
303 	0x2e, 0x61, 0x0f, 0x80,	/* FFT Summary A */
304 	0x00, 0x00, 0x06, 0x00,	/* FFT Summary B */
305 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
306 #else
307 	0x94,			/* Length */
308 	0x00,
309 	0xfb,			/* Tag */
310 	0xbb,			/* Signature */
311 	0x80, 0x0f, 0x61, 0x2e,	/* FFT Summary A */
312 	0x00, 0x06, 0x00, 0x00,	/* FFT Summary B */
313 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
314 #endif				/* BIG_ENDIAN_HOST */
315 	/* FFT Data */
316 	1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
317 	0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
318 	0, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1,
319 	0, 0, 0, 1, 0, 0, 0, 0, 2, 1, 0, 2, 1, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0,
320 	1, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0,
321 	0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0,
322 };
323 
324 /* Report data for 40MHz bandwidth for generation 3 chipsets */
325 static uint8_t reportdata_40_gen3[] = {
326 #ifdef BIG_ENDIAN_HOST
327 	0x12, 0x34, 0x56, 0x78,	/* fft_timestamp */
328 	0xfa,			/* fft_hdr_sig */
329 	0x03,			/* fft_hdr_tag */
330 	0x00,			/* fft_hdr_length */
331 	0x24,
332 	0x0f, 0xf6, 0x00, 0xe0,
333 	0x00, 0x00, 0x2f, 0xba,
334 	0x20, 0xb4, 0x2c, 0x01,
335 	0x00, 0x00, 0x00, 0x00,	/* reserved */
336 #else
337 	0x78, 0x56, 0x34, 0x12,	/* fft_timestamp */
338 	0x24,			/* fft_hdr_length */
339 	0x00,
340 	0x03,			/* fft_hdr_tag */
341 	0xfa,			/* fft_hdr_sig */
342 	0xe0, 0x00, 0xf6, 0x0f,
343 	0xba, 0x2f, 0x00, 0x00,
344 	0x01, 0x2c, 0xb4, 0x20,
345 	0x00, 0x00, 0x00, 0x00,	/* reserved */
346 #endif				/* BIG_ENDIAN_HOST */
347 	/* FFT Data */
348 	1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
349 	0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
350 	0, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1,
351 	0, 0, 0, 1, 0, 0, 0, 0, 2, 1, 0, 2, 1, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0,
352 	1, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1, 0,
353 	0, 0, 0, 1, 0, 0, 0, 0,
354 };
355 
356 /* RF measurement information for 40 MHz bandwidth */
357 static struct target_if_spectral_rfqual_info rfqual_info_40 = {
358 	.rssi_comb = 1,
359 
360 	.pc_rssi_info[0].rssi_pri20 = 1,
361 	.pc_rssi_info[0].rssi_sec20 = 2,
362 	.pc_rssi_info[0].rssi_sec40 = 128,
363 	.pc_rssi_info[0].rssi_sec80 = 128,
364 
365 	.pc_rssi_info[1].rssi_pri20 = 128,
366 	.pc_rssi_info[1].rssi_sec20 = 128,
367 	.pc_rssi_info[1].rssi_sec40 = 128,
368 	.pc_rssi_info[1].rssi_sec80 = 128,
369 
370 	.pc_rssi_info[2].rssi_pri20 = 128,
371 	.pc_rssi_info[2].rssi_sec20 = 128,
372 	.pc_rssi_info[2].rssi_sec40 = 128,
373 	.pc_rssi_info[2].rssi_sec80 = 128,
374 
375 	.pc_rssi_info[3].rssi_pri20 = 128,
376 	.pc_rssi_info[3].rssi_sec20 = 128,
377 	.pc_rssi_info[3].rssi_sec40 = 128,
378 	.pc_rssi_info[3].rssi_sec80 = 128,
379 
380 	.noise_floor[0] = -90,
381 	.noise_floor[1] = -90,
382 	.noise_floor[2] = -90,
383 	.noise_floor[3] = -90,
384 };
385 
386 /* Channel information for 40 MHz bandwidth */
387 static struct target_if_spectral_chan_info chan_info_40 = {
388 	.center_freq1 = 5180,
389 	.center_freq2 = 0,
390 	.chan_width = 40,
391 };
392 
393 /* Spectral config parameters for 40 MHz bandwidth */
394 static struct spectral_config config_40_1 = {
395 	.ss_fft_period = 1,
396 	.ss_period = 35,
397 	.ss_count = 0,
398 	.ss_short_report = 1,
399 	.radar_bin_thresh_sel = 0,
400 	.ss_spectral_pri = 1,
401 	.ss_fft_size = 8,
402 	.ss_gc_ena = 1,
403 	.ss_restart_ena = 0,
404 	.ss_noise_floor_ref = 65440,
405 	.ss_init_delay = 80,
406 	.ss_nb_tone_thr = 12,
407 	.ss_str_bin_thr = 8,
408 	.ss_wb_rpt_mode = 0,
409 	.ss_rssi_rpt_mode = 0,
410 	.ss_rssi_thr = 240,
411 	.ss_pwr_format = 0,
412 	.ss_rpt_mode = 2,
413 	.ss_bin_scale = 1,
414 	.ss_dbm_adj = 1,
415 	.ss_chn_mask = 1,
416 	.ss_nf_cal[0] = 0,
417 	.ss_nf_cal[1] = 0,
418 	.ss_nf_cal[2] = 0,
419 	.ss_nf_cal[3] = 0,
420 	.ss_nf_cal[4] = 0,
421 	.ss_nf_cal[5] = 0,
422 	.ss_nf_pwr[0] = 0,
423 	.ss_nf_pwr[1] = 0,
424 	.ss_nf_pwr[2] = 0,
425 	.ss_nf_pwr[3] = 0,
426 	.ss_nf_pwr[4] = 0,
427 	.ss_nf_pwr[5] = 0,
428 	.ss_nf_temp_data = 0,
429 };
430 
431 /* 80 MHz */
432 
433 /* Report data for 80MHz bandwidth for generation 2 chipsets */
434 static uint8_t reportdata_80_gen2[] = {
435 #ifdef BIG_ENDIAN_HOST
436 	0xbb,			/* Signature */
437 	0xfb,			/* Tag */
438 	0x01,			/* Size */
439 	0x14,
440 	0x19, 0xeb, 0x80, 0x40,	/* FFT Summary A */
441 	0x00, 0x00, 0x10, 0x00,	/* FFT Summary B */
442 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
443 #else
444 	0x14,			/* Length */
445 	0x01,
446 	0xfb,			/* Tag */
447 	0xbb,			/* Signature */
448 	0x40, 0x80, 0xeb, 0x19,	/* FFT Summary A */
449 	0x00, 0x10, 0x00, 0x00,	/* FFT Summary B */
450 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
451 #endif				/* BIG_ENDIAN_HOST */
452 	/* FFT Data */
453 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
454 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
455 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
456 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
457 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
458 	0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
459 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
460 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
461 	0, 0, 0, 1, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
462 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
463 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
464 };
465 
466 /* Report data for 80MHz bandwidth for generation 3 chipsets */
467 static uint8_t reportdata_80_gen3[] = {
468 #ifdef BIG_ENDIAN_HOST
469 	0x12, 0x34, 0x56, 0x78,	/* fft_timestamp */
470 	0xfa,			/* fft_hdr_sig */
471 	0x03,			/* fft_hdr_tag */
472 	0x00,			/* fft_hdr_length */
473 	0x44,
474 	0x0f, 0xf6, 0x00, 0xe0,
475 	0x00, 0x00, 0x2f, 0xba,
476 	0x20, 0xb4, 0x2c, 0x01,
477 	0x00, 0x00, 0x00, 0x00,	/* reserved */
478 #else
479 	0x78, 0x56, 0x34, 0x12,	/* fft_timestamp */
480 	0x44,			/* fft_hdr_length */
481 	0x00,
482 	0x03,			/* fft_hdr_tag */
483 	0xfa,			/* fft_hdr_sig */
484 	0xe0, 0x00, 0xf6, 0x0f,
485 	0xba, 0x2f, 0x00, 0x00,
486 	0x01, 0x2c, 0xb4, 0x20,
487 	0x00, 0x00, 0x00, 0x00,	/* reserved */
488 #endif				/* BIG_ENDIAN_HOST */
489 	/* FFT Data */
490 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
491 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
492 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
493 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
494 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
495 	0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
496 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
497 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
498 	0, 0, 0, 1, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
499 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
500 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
501 };
502 
503 /* RF measurement information for 80 MHz bandwidth */
504 static struct target_if_spectral_rfqual_info rfqual_info_80 = {
505 	.rssi_comb = 16,
506 
507 	.pc_rssi_info[0].rssi_pri20 = 16,
508 	.pc_rssi_info[0].rssi_sec20 = 17,
509 	.pc_rssi_info[0].rssi_sec40 = 0,
510 	.pc_rssi_info[0].rssi_sec80 = 128,
511 
512 	.pc_rssi_info[1].rssi_pri20 = 128,
513 	.pc_rssi_info[1].rssi_sec20 = 128,
514 	.pc_rssi_info[1].rssi_sec40 = 128,
515 	.pc_rssi_info[1].rssi_sec80 = 128,
516 
517 	.pc_rssi_info[2].rssi_pri20 = 128,
518 	.pc_rssi_info[2].rssi_sec20 = 128,
519 	.pc_rssi_info[2].rssi_sec40 = 128,
520 	.pc_rssi_info[2].rssi_sec80 = 128,
521 
522 	.pc_rssi_info[3].rssi_pri20 = 128,
523 	.pc_rssi_info[3].rssi_sec20 = 128,
524 	.pc_rssi_info[3].rssi_sec40 = 128,
525 	.pc_rssi_info[3].rssi_sec80 = 128,
526 
527 	.noise_floor[0] = -90,
528 	.noise_floor[1] = -90,
529 	.noise_floor[2] = -90,
530 	.noise_floor[3] = -90,
531 };
532 
533 /* Channel information for 80 MHz bandwidth */
534 static struct target_if_spectral_chan_info chan_info_80 = {
535 	.center_freq1 = 5210,
536 	.center_freq2 = 0,
537 	.chan_width = 80,
538 };
539 
540 /* Spectral config parameters for 80 MHz bandwidth */
541 static struct spectral_config config_80_1 = {
542 	.ss_fft_period = 1,
543 	.ss_period = 35,
544 	.ss_count = 0,
545 	.ss_short_report = 1,
546 	.radar_bin_thresh_sel = 0,
547 	.ss_spectral_pri = 1,
548 	.ss_fft_size = 9,
549 	.ss_gc_ena = 1,
550 	.ss_restart_ena = 0,
551 	.ss_noise_floor_ref = 65440,
552 	.ss_init_delay = 80,
553 	.ss_nb_tone_thr = 12,
554 	.ss_str_bin_thr = 8,
555 	.ss_wb_rpt_mode = 0,
556 	.ss_rssi_rpt_mode = 0,
557 	.ss_rssi_thr = 240,
558 	.ss_pwr_format = 0,
559 	.ss_rpt_mode = 2,
560 	.ss_bin_scale = 1,
561 	.ss_dbm_adj = 1,
562 	.ss_chn_mask = 1,
563 	.ss_nf_cal[0] = 0,
564 	.ss_nf_cal[1] = 0,
565 	.ss_nf_cal[2] = 0,
566 	.ss_nf_cal[3] = 0,
567 	.ss_nf_cal[4] = 0,
568 	.ss_nf_cal[5] = 0,
569 	.ss_nf_pwr[0] = 0,
570 	.ss_nf_pwr[1] = 0,
571 	.ss_nf_pwr[2] = 0,
572 	.ss_nf_pwr[3] = 0,
573 	.ss_nf_pwr[4] = 0,
574 	.ss_nf_pwr[5] = 0,
575 	.ss_nf_temp_data = 0,
576 };
577 
578 /* 160 MHz */
579 
580 /* Report data for 160MHz bandwidth for generation 2 chipsets */
581 static uint8_t reportdata_160_gen2[] = {
582 	/* Segment 1 */
583 #ifdef BIG_ENDIAN_HOST
584 	0xbb,			/* Signature */
585 	0xfb,			/* Tag */
586 	0x01,			/* Size */
587 	0x14,
588 	0x23, 0x66, 0x00, 0x40,	/* FFT Summary A */
589 	0x5c, 0x5c, 0x78, 0x00,	/* FFT Summary B */
590 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
591 #else
592 	0x14,			/* Length */
593 	0x01,
594 	0xfb,			/* Tag */
595 	0xbb,			/* Signature */
596 	0x40, 0x00, 0x66, 0x23,	/* FFT Summary A */
597 	0x00, 0x78, 0x5c, 0x5c,	/* FFT Summary B */
598 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
599 #endif				/* BIG_ENDIAN_HOST */
600 	/* FFT Data */
601 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
602 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
603 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
604 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
605 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
606 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
607 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
608 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
609 	1, 1, 2, 4, 60, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
610 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
611 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
612 	0,
613 
614 	/* Segment 2 */
615 #ifdef BIG_ENDIAN_HOST
616 	0xbb,			/* Signature */
617 	0xfb,			/* Tag */
618 	0x01,			/* Size */
619 	0x14,
620 	0x23, 0x66, 0x00, 0x40,	/* FFT Summary A */
621 	0x5c, 0x5c, 0x78, 0x00,	/* FFT Summary B */
622 	0x00, 0x00, 0x00, 0x01,	/* Segment ID */
623 #else
624 	0x14,			/* Length */
625 	0x01,
626 	0xfb,			/* Tag */
627 	0xbb,			/* Signature */
628 	0x40, 0x00, 0x66, 0x23,	/* FFT Summary A */
629 	0x00, 0x78, 0x5c, 0x5c,	/* FFT Summary B */
630 	0x01, 0x00, 0x00, 0x00,	/* Segment ID */
631 #endif				/* BIG_ENDIAN_HOST */
632 	/* FFT Data */
633 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
634 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
635 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
636 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
637 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
638 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
639 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
640 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
641 	1, 1, 2, 4, 60, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
642 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
643 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
644 	0,
645 };
646 
647 /* Report data for 160MHz bandwidth for generation 3 chipsets */
648 static uint8_t reportdata_160_gen3[] = {
649 	/* Segment 1 */
650 #ifdef BIG_ENDIAN_HOST
651 	0x12, 0x34, 0x56, 0x78,	/* fft_timestamp */
652 	0xfa,			/* fft_hdr_sig */
653 	0x03,			/* fft_hdr_tag */
654 	0x00,			/* fft_hdr_length */
655 	0x44,
656 	0x0f, 0xf6, 0x00, 0xe0,
657 	0x00, 0x00, 0x2f, 0xba,
658 	0x20, 0xb4, 0x2c, 0x01,
659 	0x00, 0x00, 0x00, 0x00,	/* reserved */
660 #else
661 	0x78, 0x56, 0x34, 0x12,	/* fft_timestamp */
662 	0x44,			/* fft_hdr_length */
663 	0x00,
664 	0x03,			/* fft_hdr_tag */
665 	0xfa,			/* fft_hdr_sig */
666 	0xe0, 0x00, 0xf6, 0x0f,
667 	0xba, 0x2f, 0x00, 0x00,
668 	0x01, 0x2c, 0xb4, 0x20,
669 	0x00, 0x00, 0x00, 0x00,	/* reserved */
670 #endif				/* BIG_ENDIAN_HOST */
671 	/* FFT Data */
672 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
673 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
674 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
675 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
676 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
677 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
678 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
679 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
680 	1, 1, 2, 4, 60, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
681 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
682 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
683 
684 	/* Segment 2 */
685 #ifdef BIG_ENDIAN_HOST
686 	0x12, 0x34, 0x56, 0x78,	/* fft_timestamp */
687 	0xfa,			/* fft_hdr_sig */
688 	0x03,			/* fft_hdr_tag */
689 	0x00,			/* fft_hdr_length */
690 	0x44,
691 	0x0f, 0xf6, 0x00, 0xe1,
692 	0x00, 0x00, 0x2f, 0xba,
693 	0x20, 0xb4, 0x2c, 0x01,
694 	0x00, 0x00, 0x00, 0x00,	/* reserved */
695 #else
696 	0x78, 0x56, 0x34, 0x12,	/* fft_timestamp */
697 	0x44,			/* fft_hdr_length */
698 	0x00,
699 	0x03,			/* fft_hdr_tag */
700 	0xfa,			/* fft_hdr_sig */
701 	0xe1, 0x00, 0xf6, 0x0f,
702 	0xba, 0x2f, 0x00, 0x00,
703 	0x01, 0x2c, 0xb4, 0x20,
704 	0x00, 0x00, 0x00, 0x00,	/* reserved */
705 #endif				/* BIG_ENDIAN_HOST */
706 	/* FFT Data */
707 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
708 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
709 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
710 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
711 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
712 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
713 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
714 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
715 	1, 1, 2, 4, 60, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
716 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
717 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
718 };
719 
720 /* RF measurement information for 160 MHz bandwidth */
721 static struct target_if_spectral_rfqual_info rfqual_info_160 = {
722 	.rssi_comb = 3,
723 
724 	.pc_rssi_info[0].rssi_pri20 = 3,
725 	.pc_rssi_info[0].rssi_sec20 = 12,
726 	.pc_rssi_info[0].rssi_sec40 = 41,
727 	.pc_rssi_info[0].rssi_sec80 = 128,
728 
729 	.pc_rssi_info[1].rssi_pri20 = 128,
730 	.pc_rssi_info[1].rssi_sec20 = 128,
731 	.pc_rssi_info[1].rssi_sec40 = 128,
732 	.pc_rssi_info[1].rssi_sec80 = 128,
733 
734 	.pc_rssi_info[2].rssi_pri20 = 128,
735 	.pc_rssi_info[2].rssi_sec20 = 128,
736 	.pc_rssi_info[2].rssi_sec40 = 128,
737 	.pc_rssi_info[2].rssi_sec80 = 128,
738 
739 	.pc_rssi_info[3].rssi_pri20 = 128,
740 	.pc_rssi_info[3].rssi_sec20 = 128,
741 	.pc_rssi_info[3].rssi_sec40 = 128,
742 	.pc_rssi_info[3].rssi_sec80 = 128,
743 
744 	.noise_floor[0] = -90,
745 	.noise_floor[1] = -90,
746 	.noise_floor[2] = -90,
747 	.noise_floor[3] = -90,
748 };
749 
750 /* Channel information for 160 MHz bandwidth */
751 static struct target_if_spectral_chan_info chan_info_160 = {
752 	.center_freq1 = 5250,
753 	.center_freq2 = 0,
754 	.chan_width = 160,
755 };
756 
757 /* Spectral config parameters for 160 MHz bandwidth */
758 static struct spectral_config config_160_1 = {
759 	.ss_fft_period = 1,
760 	.ss_period = 35,
761 	.ss_count = 0,
762 	.ss_short_report = 1,
763 	.radar_bin_thresh_sel = 0,
764 	.ss_spectral_pri = 1,
765 	.ss_fft_size = 9,
766 	.ss_gc_ena = 1,
767 	.ss_restart_ena = 0,
768 	.ss_noise_floor_ref = 65440,
769 	.ss_init_delay = 80,
770 	.ss_nb_tone_thr = 12,
771 	.ss_str_bin_thr = 8,
772 	.ss_wb_rpt_mode = 0,
773 	.ss_rssi_rpt_mode = 0,
774 	.ss_rssi_thr = 240,
775 	.ss_pwr_format = 0,
776 	.ss_rpt_mode = 2,
777 	.ss_bin_scale = 1,
778 	.ss_dbm_adj = 1,
779 	.ss_chn_mask = 1,
780 	.ss_nf_cal[0] = 0,
781 	.ss_nf_cal[1] = 0,
782 	.ss_nf_cal[2] = 0,
783 	.ss_nf_cal[3] = 0,
784 	.ss_nf_cal[4] = 0,
785 	.ss_nf_cal[5] = 0,
786 	.ss_nf_pwr[0] = 0,
787 	.ss_nf_pwr[1] = 0,
788 	.ss_nf_pwr[2] = 0,
789 	.ss_nf_pwr[3] = 0,
790 	.ss_nf_pwr[4] = 0,
791 	.ss_nf_pwr[5] = 0,
792 	.ss_nf_temp_data = 0,
793 };
794 
795 /* 80+80 MHz */
796 
797 /* Report data for 80_80MHz bandwidth for generation 2 chipsets */
798 static uint8_t reportdata_80_80_gen2[] = {
799 	/* Segment 1 */
800 #ifdef BIG_ENDIAN_HOST
801 	0xbb,			/* Signature */
802 	0xfb,			/* Tag */
803 	0x01,			/* Size */
804 	0x14,
805 	0x23, 0x66, 0x00, 0x40,	/* FFT Summary A */
806 	0x64, 0x64, 0x89, 0x00,	/* FFT Summary B */
807 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
808 #else
809 	0x14,			/* Length */
810 	0x01,
811 	0xfb,			/* Tag */
812 	0xbb,			/* Signature */
813 	0x40, 0x00, 0x66, 0x23,	/* FFT Summary A */
814 	0x00, 0x89, 0x64, 0x64,	/* FFT Summary B */
815 	0x00, 0x00, 0x00, 0x00,	/* Segment ID */
816 #endif				/* BIG_ENDIAN_HOST */
817 	/* FFT Data */
818 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
819 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
820 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
821 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
822 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
823 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
824 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
825 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
826 	1, 1, 2, 6, 68, 5, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
827 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
828 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
829 	0,
830 
831 	/* Segment 2 */
832 #ifdef BIG_ENDIAN_HOST
833 	0xbb,			/* Signature */
834 	0xfb,			/* Tag */
835 	0x01,			/* Size */
836 	0x14,
837 	0x23, 0x66, 0x00, 0x40,	/* FFT Summary A */
838 	0x64, 0x64, 0x89, 0x00,	/* FFT Summary B */
839 	0x00, 0x00, 0x00, 0x01,	/* Segment ID */
840 #else
841 	0x14,			/* Length */
842 	0x01,
843 	0xfb,			/* Tag */
844 	0xbb,			/* Signature */
845 	0x40, 0x00, 0x66, 0x23,	/* FFT Summary A */
846 	0x00, 0x89, 0x64, 0x64,	/* FFT Summary B */
847 	0x01, 0x00, 0x00, 0x00,	/* Segment ID */
848 #endif				/* BIG_ENDIAN_HOST */
849 	/* FFT Data */
850 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
851 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
852 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
853 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
854 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
855 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
856 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
857 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
858 	1, 1, 2, 6, 68, 5, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
859 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
860 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
861 	0,
862 };
863 
864 /* Report data for 80_80MHz bandwidth for generation 3 chipsets */
865 static uint8_t reportdata_80_80_gen3[] = {
866 	/* Segment 1 */
867 #ifdef BIG_ENDIAN_HOST
868 	0x12, 0x34, 0x56, 0x78,	/* fft_timestamp */
869 	0xfa,			/* fft_hdr_sig */
870 	0x03,			/* fft_hdr_tag */
871 	0x00,			/* fft_hdr_length */
872 	0x44,
873 	0x0f, 0xf6, 0x00, 0xe0,
874 	0x00, 0x00, 0x2f, 0xba,
875 	0x20, 0xb4, 0x2c, 0x01,
876 	0x00, 0x00, 0x00, 0x00,	/* reserved */
877 #else
878 	0x78, 0x56, 0x34, 0x12,	/* fft_timestamp */
879 	0x44,			/* fft_hdr_length */
880 	0x00,
881 	0x03,			/* fft_hdr_tag */
882 	0xfa,			/* fft_hdr_sig */
883 	0xe0, 0x00, 0xf6, 0x0f,
884 	0xba, 0x2f, 0x00, 0x00,
885 	0x01, 0x2c, 0xb4, 0x20,
886 	0x00, 0x00, 0x00, 0x00,	/* reserved */
887 #endif				/* BIG_ENDIAN_HOST */
888 	/* FFT Data */
889 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
890 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
891 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
892 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
893 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
894 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
895 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
896 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
897 	1, 1, 2, 6, 68, 5, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
898 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
899 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
900 
901 	/* Segment 2 */
902 #ifdef BIG_ENDIAN_HOST
903 	0x12, 0x34, 0x56, 0x78,	/* fft_timestamp */
904 	0xfa,			/* fft_hdr_sig */
905 	0x03,			/* fft_hdr_tag */
906 	0x00,			/* fft_hdr_length */
907 	0x44,
908 	0x0f, 0xf6, 0x00, 0xe1,
909 	0x00, 0x00, 0x2f, 0xba,
910 	0x20, 0xb4, 0x2c, 0x01,
911 	0x00, 0x00, 0x00, 0x00,	/* reserved */
912 #else
913 	0x78, 0x56, 0x34, 0x12,	/* fft_timestamp */
914 	0x44,			/* fft_hdr_length */
915 	0x00,
916 	0x03,			/* fft_hdr_tag */
917 	0xfa,			/* fft_hdr_sig */
918 	0xe1, 0x00, 0xf6, 0x0f,
919 	0xba, 0x2f, 0x00, 0x00,
920 	0x01, 0x2c, 0xb4, 0x20,
921 	0x00, 0x00, 0x00, 0x00,	/* reserved */
922 #endif				/* BIG_ENDIAN_HOST */
923 	/* FFT Data */
924 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
925 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
926 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
927 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
928 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
929 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
930 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
931 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
932 	1, 1, 2, 6, 68, 5, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
933 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
934 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
935 };
936 
937 /* RF measurement information for 80_80 MHz bandwidth */
938 static struct target_if_spectral_rfqual_info rfqual_info_80_80 = {
939 	.rssi_comb = 1,
940 
941 	.pc_rssi_info[0].rssi_pri20 = 1,
942 	.pc_rssi_info[0].rssi_sec20 = 17,
943 	.pc_rssi_info[0].rssi_sec40 = 40,
944 	.pc_rssi_info[0].rssi_sec80 = 128,
945 
946 	.pc_rssi_info[1].rssi_pri20 = 128,
947 	.pc_rssi_info[1].rssi_sec20 = 128,
948 	.pc_rssi_info[1].rssi_sec40 = 128,
949 	.pc_rssi_info[1].rssi_sec80 = 128,
950 
951 	.pc_rssi_info[2].rssi_pri20 = 128,
952 	.pc_rssi_info[2].rssi_sec20 = 128,
953 	.pc_rssi_info[2].rssi_sec40 = 128,
954 	.pc_rssi_info[2].rssi_sec80 = 128,
955 
956 	.pc_rssi_info[3].rssi_pri20 = 128,
957 	.pc_rssi_info[3].rssi_sec20 = 128,
958 	.pc_rssi_info[3].rssi_sec40 = 128,
959 	.pc_rssi_info[3].rssi_sec80 = 128,
960 
961 	.noise_floor[0] = -90,
962 	.noise_floor[1] = -90,
963 	.noise_floor[2] = -90,
964 	.noise_floor[3] = -90,
965 };
966 
967 /* Channel information for 80_80 MHz bandwidth */
968 static struct target_if_spectral_chan_info chan_info_80_80 = {
969 	.center_freq1 = 5210,
970 	.center_freq2 = 5530,
971 	.chan_width = 160,
972 };
973 
974 /* Spectral config parameters for 80_80 MHz bandwidth */
975 static struct spectral_config config_80_80_1 = {
976 	.ss_fft_period = 1,
977 	.ss_period = 35,
978 	.ss_count = 0,
979 	.ss_short_report = 1,
980 	.radar_bin_thresh_sel = 0,
981 	.ss_spectral_pri = 1,
982 	.ss_fft_size = 9,
983 	.ss_gc_ena = 1,
984 	.ss_restart_ena = 0,
985 	.ss_noise_floor_ref = 65440,
986 	.ss_init_delay = 80,
987 	.ss_nb_tone_thr = 12,
988 	.ss_str_bin_thr = 8,
989 	.ss_wb_rpt_mode = 0,
990 	.ss_rssi_rpt_mode = 0,
991 	.ss_rssi_thr = 240,
992 	.ss_pwr_format = 0,
993 	.ss_rpt_mode = 2,
994 	.ss_bin_scale = 1,
995 	.ss_dbm_adj = 1,
996 	.ss_chn_mask = 1,
997 	.ss_nf_cal[0] = 0,
998 	.ss_nf_cal[1] = 0,
999 	.ss_nf_cal[2] = 0,
1000 	.ss_nf_cal[3] = 0,
1001 	.ss_nf_cal[4] = 0,
1002 	.ss_nf_cal[5] = 0,
1003 	.ss_nf_pwr[0] = 0,
1004 	.ss_nf_pwr[1] = 0,
1005 	.ss_nf_pwr[2] = 0,
1006 	.ss_nf_pwr[3] = 0,
1007 	.ss_nf_pwr[4] = 0,
1008 	.ss_nf_pwr[5] = 0,
1009 	.ss_nf_temp_data = 0,
1010 };
1011 
1012 #endif				/* QCA_SUPPORT_SPECTRAL_SIMULATION */
1013 #endif				/* _SPECTRAL_SIM_INTERNAL_H_ */
1014