1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name /** 21*5113495bSYour Name * DOC: wlan_dfs_public_struct.h 22*5113495bSYour Name * This file contains DFS data structures 23*5113495bSYour Name */ 24*5113495bSYour Name 25*5113495bSYour Name #ifndef __WLAN_DFS_PUBLIC_STRUCT_H_ 26*5113495bSYour Name #define __WLAN_DFS_PUBLIC_STRUCT_H_ 27*5113495bSYour Name #include <wlan_cmn.h> 28*5113495bSYour Name /* TODO: This structure has many redundant variables, needs cleanup */ 29*5113495bSYour Name /** 30*5113495bSYour Name * struct radar_found_info - radar found info 31*5113495bSYour Name * @pdev_id: pdev id. 32*5113495bSYour Name * @detection_mode: 0 indicates RADAR detected, non-zero indicates debug mode. 33*5113495bSYour Name * @freq_offset: frequency offset. 34*5113495bSYour Name * @chan_width: channel width. 35*5113495bSYour Name * @detector_id: detector id for full-offload. 36*5113495bSYour Name * @segment_id: segment id (same as detector_id) for partial-offload. 37*5113495bSYour Name * @timestamp: timestamp (Time when filter match is found in Firmware). 38*5113495bSYour Name * @is_chirp: is chirp or not. 39*5113495bSYour Name * @chan_freq: channel frequency (Primary channel frequency). 40*5113495bSYour Name * @radar_freq: radar frequency (Is it same as '@chan_freq'?). 41*5113495bSYour Name * @sidx: sidx value (same as freq_offset). 42*5113495bSYour Name * @is_full_bw_nol: Is full bandwidth needed to put to NOL. 43*5113495bSYour Name */ 44*5113495bSYour Name struct radar_found_info { 45*5113495bSYour Name uint32_t pdev_id; 46*5113495bSYour Name uint32_t detection_mode; 47*5113495bSYour Name int32_t freq_offset; 48*5113495bSYour Name uint32_t chan_width; 49*5113495bSYour Name uint32_t detector_id; 50*5113495bSYour Name uint32_t segment_id; 51*5113495bSYour Name uint32_t timestamp; 52*5113495bSYour Name uint32_t is_chirp; 53*5113495bSYour Name uint32_t chan_freq; 54*5113495bSYour Name uint32_t radar_freq; 55*5113495bSYour Name int32_t sidx; 56*5113495bSYour Name uint8_t is_full_bw_nol; 57*5113495bSYour Name }; 58*5113495bSYour Name 59*5113495bSYour Name /** 60*5113495bSYour Name * struct dfs_acs_info - acs info, ch range 61*5113495bSYour Name * @acs_mode: to enable/disable acs 1/0. 62*5113495bSYour Name * @chan_freq_list: channel frequency list 63*5113495bSYour Name * @num_of_channel: number of channel in ACS channel list 64*5113495bSYour Name */ 65*5113495bSYour Name struct dfs_acs_info { 66*5113495bSYour Name uint8_t acs_mode; 67*5113495bSYour Name uint32_t *chan_freq_list; 68*5113495bSYour Name uint8_t num_of_channel; 69*5113495bSYour Name }; 70*5113495bSYour Name 71*5113495bSYour Name /** 72*5113495bSYour Name * struct radar_event_info - radar event info. 73*5113495bSYour Name * @pulse_is_chirp: flag to indicate if this pulse is chirp. 74*5113495bSYour Name * @pulse_center_freq: the center frequency of the radar pulse detected, KHz. 75*5113495bSYour Name * @pulse_duration: the duaration of the pulse in us. 76*5113495bSYour Name * @rssi: RSSI recorded in the ppdu. 77*5113495bSYour Name * @pulse_detect_ts: timestamp indicates the time when DFS pulse is detected. 78*5113495bSYour Name * @upload_fullts_low: low 32 tsf timestamp get from MAC tsf timer indicates 79*5113495bSYour Name * the time that the radar event uploading to host. 80*5113495bSYour Name * @upload_fullts_high: high 32 tsf timestamp get from MAC tsf timer indicates 81*5113495bSYour Name * the time that the radar event uploading to host. 82*5113495bSYour Name * @peak_sidx: index of peak magnitude bin (signed) 83*5113495bSYour Name * @pdev_id: pdev_id for identifying the MAC. 84*5113495bSYour Name * @delta_diff: Delta diff value. 85*5113495bSYour Name * @delta_peak: Delta peak value. 86*5113495bSYour Name * @psidx_diff: Psidx diff value. 87*5113495bSYour Name * @is_psidx_diff_valid: Does fw send valid psidx diff. 88*5113495bSYour Name */ 89*5113495bSYour Name struct radar_event_info { 90*5113495bSYour Name uint8_t pulse_is_chirp; 91*5113495bSYour Name uint32_t pulse_center_freq; 92*5113495bSYour Name uint32_t pulse_duration; 93*5113495bSYour Name uint8_t rssi; 94*5113495bSYour Name uint32_t pulse_detect_ts; 95*5113495bSYour Name uint32_t upload_fullts_low; 96*5113495bSYour Name uint32_t upload_fullts_high; 97*5113495bSYour Name int32_t peak_sidx; 98*5113495bSYour Name uint8_t pdev_id; 99*5113495bSYour Name uint8_t delta_diff; 100*5113495bSYour Name int8_t delta_peak; 101*5113495bSYour Name int8_t psidx_diff; 102*5113495bSYour Name int8_t is_psidx_diff_valid; 103*5113495bSYour Name }; 104*5113495bSYour Name 105*5113495bSYour Name /** 106*5113495bSYour Name * struct dfs_user_config - user configuration required for for DFS. 107*5113495bSYour Name * @dfs_is_phyerr_filter_offload: flag to indicate DFS phyerr filtering offload. 108*5113495bSYour Name */ 109*5113495bSYour Name struct dfs_user_config { 110*5113495bSYour Name bool dfs_is_phyerr_filter_offload; 111*5113495bSYour Name }; 112*5113495bSYour Name 113*5113495bSYour Name /** 114*5113495bSYour Name * struct dfs_radar_found_params - radar found parameters. 115*5113495bSYour Name * @pri_min: Minimum PRI of detected radar pulse. 116*5113495bSYour Name * @pri_max: Max PRI of detected radar pulse. 117*5113495bSYour Name * @duration_min: Min duration of detected pulse in us. 118*5113495bSYour Name * @duration_max: Max duration of detected pulse in us. 119*5113495bSYour Name * @sidx_min: Min softare index of detected radar pulse. 120*5113495bSYour Name * @sidx_max: Max software index of detected radar pulse. 121*5113495bSYour Name */ 122*5113495bSYour Name struct dfs_radar_found_params { 123*5113495bSYour Name u_int32_t pri_min; 124*5113495bSYour Name u_int32_t pri_max; 125*5113495bSYour Name u_int32_t duration_min; 126*5113495bSYour Name u_int32_t duration_max; 127*5113495bSYour Name u_int32_t sidx_min; 128*5113495bSYour Name u_int32_t sidx_max; 129*5113495bSYour Name }; 130*5113495bSYour Name 131*5113495bSYour Name /** 132*5113495bSYour Name * enum adfs_ocac_mode - Various Off-Channel CAC modes. 133*5113495bSYour Name * @QUICK_OCAC_MODE: Used for OCAC where the CAC timeout value is finite. 134*5113495bSYour Name * This is also known as PreCAC. 135*5113495bSYour Name * @EXTENSIVE_OCAC_MODE: Extensive OCAC. 136*5113495bSYour Name * @QUICK_RCAC_MODE: Used for RollingCAC where the timeout value is assumed to 137*5113495bSYour Name * be infinite by the Firmware code, that is, the FW has to 138*5113495bSYour Name * be on the agile channel until host stop/aborts the agile 139*5113495bSYour Name * CAC. 140*5113495bSYour Name */ 141*5113495bSYour Name enum adfs_ocac_mode { 142*5113495bSYour Name QUICK_OCAC_MODE = 0, 143*5113495bSYour Name EXTENSIVE_OCAC_MODE, 144*5113495bSYour Name QUICK_RCAC_MODE, 145*5113495bSYour Name }; 146*5113495bSYour Name 147*5113495bSYour Name /** 148*5113495bSYour Name * struct dfs_agile_cac_params - Agile DFS-CAC parameters. 149*5113495bSYour Name * @precac_chan: Agile preCAC channel. 150*5113495bSYour Name * @precac_center_freq_1: Agile preCAC channel frequency in MHz for 20/40/80/ 151*5113495bSYour Name * 160 and left center frequency(5690MHz) for restricted 152*5113495bSYour Name * 80p80. 153*5113495bSYour Name * @precac_center_freq_2: Second segment Agile frequency if applicable. 0 for 154*5113495bSYour Name * 20/40/80/160 and right center frequency(5775MHz) for 155*5113495bSYour Name * restricted 80p80. 156*5113495bSYour Name * @precac_chwidth: Agile preCAC channel width. 157*5113495bSYour Name * @min_precac_timeout: Minimum agile preCAC timeout. 158*5113495bSYour Name * @max_precac_timeout: Maximum agile preCAC timeout. 159*5113495bSYour Name * @ocac_mode: Off-Channel CAC mode. 160*5113495bSYour Name */ 161*5113495bSYour Name struct dfs_agile_cac_params { 162*5113495bSYour Name uint8_t precac_chan; 163*5113495bSYour Name uint16_t precac_center_freq_1; 164*5113495bSYour Name uint16_t precac_center_freq_2; 165*5113495bSYour Name enum phy_ch_width precac_chwidth; 166*5113495bSYour Name uint32_t min_precac_timeout; 167*5113495bSYour Name uint32_t max_precac_timeout; 168*5113495bSYour Name enum adfs_ocac_mode ocac_mode; 169*5113495bSYour Name }; 170*5113495bSYour Name 171*5113495bSYour Name /* The first DFS channel number is 52 and the last DFS channel number is 161(in 172*5113495bSYour Name * case of ETSI EN302502). So, the array size is taken as (161 - 52) / 4 ~= 30. 173*5113495bSYour Name */ 174*5113495bSYour Name #define NUM_DFS_CHANS 30 175*5113495bSYour Name 176*5113495bSYour Name /** 177*5113495bSYour Name * enum channel_dfs_state - DFS channel states. 178*5113495bSYour Name * @CH_DFS_S_INVALID: The DFS state for invalid channel numbers that are not 179*5113495bSYour Name * part of the radio's channel list. 180*5113495bSYour Name * @CH_DFS_S_CAC_REQ: Indicates that the CAC/Off-channel CAC has to performed 181*5113495bSYour Name * before Tx on the DFS channel. 182*5113495bSYour Name * @CH_DFS_S_CAC_STARTED: Indicates that the CAC has been started for the DFS 183*5113495bSYour Name * channel. 184*5113495bSYour Name * @CH_DFS_S_CAC_COMPLETED: Indicates that the CAC has been completed for the 185*5113495bSYour Name * DFS channel. 186*5113495bSYour Name * @CH_DFS_S_NOL: Indicates that the DFS channel is in NOL. 187*5113495bSYour Name * @CH_DFS_S_PRECAC_STARTED: Indicates that the PreCAC has been started for the 188*5113495bSYour Name * DFS channel. 189*5113495bSYour Name * @CH_DFS_S_PRECAC_COMPLETED: Indicates that the PreCAC has been completed for 190*5113495bSYour Name * the DFS channel. 191*5113495bSYour Name * @CH_DFS_S_NON_DFS: Indicates that it is a non-DFS channel. 192*5113495bSYour Name */ 193*5113495bSYour Name enum channel_dfs_state { 194*5113495bSYour Name CH_DFS_S_INVALID, 195*5113495bSYour Name CH_DFS_S_CAC_REQ, 196*5113495bSYour Name CH_DFS_S_CAC_STARTED, 197*5113495bSYour Name CH_DFS_S_CAC_COMPLETED, 198*5113495bSYour Name CH_DFS_S_NOL, 199*5113495bSYour Name CH_DFS_S_PRECAC_STARTED, 200*5113495bSYour Name CH_DFS_S_PRECAC_COMPLETED, 201*5113495bSYour Name CH_DFS_S_NON_DFS, 202*5113495bSYour Name }; 203*5113495bSYour Name 204*5113495bSYour Name /** 205*5113495bSYour Name * enum ocac_status_type - Enum for OCAC status for Agile DFS. 206*5113495bSYour Name * @OCAC_SUCCESS: OCAC completed successfully. 207*5113495bSYour Name * @OCAC_RESET: OCAC status was reset. 208*5113495bSYour Name * @OCAC_CANCEL: OCAC canceled. 209*5113495bSYour Name */ 210*5113495bSYour Name enum ocac_status_type { 211*5113495bSYour Name OCAC_SUCCESS = 0, 212*5113495bSYour Name OCAC_RESET, 213*5113495bSYour Name OCAC_CANCEL, 214*5113495bSYour Name }; 215*5113495bSYour Name #endif 216