1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2016-2018, 2020 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name #ifndef _WMI_UNIFIED_DBR_PARAM_H_ 21*5113495bSYour Name #define _WMI_UNIFIED_DBR_PARAM_H_ 22*5113495bSYour Name 23*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_LO_S 0 24*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_LO_M 0xffffffff 25*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_LO \ 26*5113495bSYour Name (WMI_HOST_DBR_RING_ADDR_LO_M << WMI_HOST_DBR_RING_ADDR_LO_S) 27*5113495bSYour Name 28*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_LO_GET(dword) \ 29*5113495bSYour Name WMI_HOST_F_MS(dword, WMI_HOST_DBR_RING_ADDR_LO) 30*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_LO_SET(dword, val) \ 31*5113495bSYour Name WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_RING_ADDR_LO) 32*5113495bSYour Name 33*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_HI_S 0 34*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_HI_M 0xf 35*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_HI \ 36*5113495bSYour Name (WMI_HOST_DBR_RING_ADDR_HI_M << WMI_HOST_DBR_RING_ADDR_HI_S) 37*5113495bSYour Name 38*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_HI_GET(dword) \ 39*5113495bSYour Name WMI_HOST_F_MS(dword, WMI_HOST_DBR_RING_ADDR_HI) 40*5113495bSYour Name #define WMI_HOST_DBR_RING_ADDR_HI_SET(dword, val) \ 41*5113495bSYour Name WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_RING_ADDR_HI) 42*5113495bSYour Name 43*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_LO_S 0 44*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_LO_M 0xffffffff 45*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_LO \ 46*5113495bSYour Name (WMI_HOST_DBR_DATA_ADDR_LO_M << WMI_HOST_DBR_DATA_ADDR_LO_S) 47*5113495bSYour Name 48*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_LO_GET(dword) \ 49*5113495bSYour Name WMI_HOST_F_MS(dword, WMI_HOST_DBR_DATA_ADDR_LO) 50*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_LO_SET(dword, val) \ 51*5113495bSYour Name WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_DATA_ADDR_LO) 52*5113495bSYour Name 53*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_S 0 54*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_M 0xf 55*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI \ 56*5113495bSYour Name (WMI_HOST_DBR_DATA_ADDR_HI_M << WMI_HOST_DBR_DATA_ADDR_HI_S) 57*5113495bSYour Name 58*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_GET(dword) \ 59*5113495bSYour Name WMI_HOST_F_MS(dword, WMI_HOST_DBR_DATA_ADDR_HI) 60*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_SET(dword, val) \ 61*5113495bSYour Name WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_DATA_ADDR_HI) 62*5113495bSYour Name 63*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_S 12 64*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_M 0x7ffff 65*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA \ 66*5113495bSYour Name (WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_M << \ 67*5113495bSYour Name WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_S) 68*5113495bSYour Name 69*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_GET(dword) \ 70*5113495bSYour Name WMI_HOST_F_MS(dword, WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA) 71*5113495bSYour Name #define WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA_SET(dword, val) \ 72*5113495bSYour Name WMI_HOST_F_RMW(dword, val, WMI_HOST_DBR_DATA_ADDR_HI_HOST_DATA) 73*5113495bSYour Name 74*5113495bSYour Name #define WMI_HOST_MAX_NUM_CHAINS 8 75*5113495bSYour Name 76*5113495bSYour Name /** 77*5113495bSYour Name * struct direct_buf_rx_rsp: direct buffer rx response structure 78*5113495bSYour Name * 79*5113495bSYour Name * @pdev_id: Index of the pdev for which response is received 80*5113495bSYour Name * @mod_id: Index of the module for which respone is received 81*5113495bSYour Name * @num_buf_release_entry: Number of buffers released through event 82*5113495bSYour Name * @num_meta_data_entry: Number of meta data released 83*5113495bSYour Name * @num_cv_meta_data_entry: Number of cv meta data released 84*5113495bSYour Name * @num_cqi_meta_data_entry: Number of cqi meta data released 85*5113495bSYour Name * @dbr_entries: Pointer to direct buffer rx entry struct 86*5113495bSYour Name */ 87*5113495bSYour Name struct direct_buf_rx_rsp { 88*5113495bSYour Name uint32_t pdev_id; 89*5113495bSYour Name uint32_t mod_id; 90*5113495bSYour Name uint32_t num_buf_release_entry; 91*5113495bSYour Name uint32_t num_meta_data_entry; 92*5113495bSYour Name uint32_t num_cv_meta_data_entry; 93*5113495bSYour Name uint32_t num_cqi_meta_data_entry; 94*5113495bSYour Name struct direct_buf_rx_entry *dbr_entries; 95*5113495bSYour Name }; 96*5113495bSYour Name 97*5113495bSYour Name /** 98*5113495bSYour Name * struct direct_buf_rx_cfg_req: direct buffer rx config request structure 99*5113495bSYour Name * 100*5113495bSYour Name * @pdev_id: Index of the pdev for which response is received 101*5113495bSYour Name * @mod_id: Index of the module for which respone is received 102*5113495bSYour Name * @base_paddr_lo: Lower 32bits of ring base address 103*5113495bSYour Name * @base_paddr_hi: Higher 32bits of ring base address 104*5113495bSYour Name * @head_idx_paddr_lo: Lower 32bits of head idx register address 105*5113495bSYour Name * @head_idx_paddr_hi: Higher 32bits of head idx register address 106*5113495bSYour Name * @tail_idx_paddr_lo: Lower 32bits of tail idx register address 107*5113495bSYour Name * @tail_idx_paddr_hi: Higher 32bits of tail idx register address 108*5113495bSYour Name * @buf_size: Size of the buffer for each pointer in the ring 109*5113495bSYour Name * @num_elems: Number of pointers allocated and part of the source ring 110*5113495bSYour Name * @event_timeout_ms: 111*5113495bSYour Name * @num_resp_per_event: 112*5113495bSYour Name */ 113*5113495bSYour Name struct direct_buf_rx_cfg_req { 114*5113495bSYour Name uint32_t pdev_id; 115*5113495bSYour Name uint32_t mod_id; 116*5113495bSYour Name uint32_t base_paddr_lo; 117*5113495bSYour Name uint32_t base_paddr_hi; 118*5113495bSYour Name uint32_t head_idx_paddr_lo; 119*5113495bSYour Name uint32_t head_idx_paddr_hi; 120*5113495bSYour Name uint32_t tail_idx_paddr_hi; 121*5113495bSYour Name uint32_t tail_idx_paddr_lo; 122*5113495bSYour Name uint32_t buf_size; 123*5113495bSYour Name uint32_t num_elems; 124*5113495bSYour Name uint32_t event_timeout_ms; 125*5113495bSYour Name uint32_t num_resp_per_event; 126*5113495bSYour Name }; 127*5113495bSYour Name 128*5113495bSYour Name /** 129*5113495bSYour Name * struct direct_buf_rx_metadata: direct buffer metadata 130*5113495bSYour Name * 131*5113495bSYour Name * @noisefloor: noisefloor 132*5113495bSYour Name * @reset_delay: reset delay 133*5113495bSYour Name * @cfreq1: center frequency 1 134*5113495bSYour Name * @cfreq2: center frequency 2 135*5113495bSYour Name * @ch_width: channel width 136*5113495bSYour Name */ 137*5113495bSYour Name struct direct_buf_rx_metadata { 138*5113495bSYour Name int32_t noisefloor[WMI_HOST_MAX_NUM_CHAINS]; 139*5113495bSYour Name uint32_t reset_delay; 140*5113495bSYour Name uint32_t cfreq1; 141*5113495bSYour Name uint32_t cfreq2; 142*5113495bSYour Name uint32_t ch_width; 143*5113495bSYour Name }; 144*5113495bSYour Name 145*5113495bSYour Name /** 146*5113495bSYour Name * struct direct_buf_rx_cv_metadata: direct buffer metadata for TxBF CV upload 147*5113495bSYour Name * 148*5113495bSYour Name * @is_valid: Set cv metadata is valid, 149*5113495bSYour Name * false if sw_peer_id is invalid or FCS error 150*5113495bSYour Name * @fb_type: Feedback type, 0 for SU 1 for MU 151*5113495bSYour Name * @asnr_len: Average SNR length 152*5113495bSYour Name * @asnr_offset: Average SNR offset 153*5113495bSYour Name * @dsnr_len: Delta SNR length 154*5113495bSYour Name * @dsnr_offset: Delta SNR offset 155*5113495bSYour Name * @peer_mac: Peer macaddr 156*5113495bSYour Name * @fb_params: Feedback params, [1:0] Nc [3:2] nss_num 157*5113495bSYour Name */ 158*5113495bSYour Name struct direct_buf_rx_cv_metadata { 159*5113495bSYour Name uint32_t is_valid; 160*5113495bSYour Name uint32_t fb_type; 161*5113495bSYour Name uint16_t asnr_len; 162*5113495bSYour Name uint16_t asnr_offset; 163*5113495bSYour Name uint16_t dsnr_len; 164*5113495bSYour Name uint16_t dsnr_offset; 165*5113495bSYour Name struct qdf_mac_addr peer_mac; 166*5113495bSYour Name uint32_t fb_params; 167*5113495bSYour Name }; 168*5113495bSYour Name 169*5113495bSYour Name /* 170*5113495bSYour Name * In CQI data buffer, each user CQI data will be stored 171*5113495bSYour Name * in a fixed offset of 64 locations from each other, 172*5113495bSYour Name * and each location corresponds to 64-bit length. 173*5113495bSYour Name */ 174*5113495bSYour Name #define CQI_USER_DATA_LENGTH (64 * 8) 175*5113495bSYour Name #define CQI_USER_DATA_OFFSET(idx) ((idx) * CQI_USER_DATA_LENGTH) 176*5113495bSYour Name #define MAX_NUM_CQI_USERS 3 177*5113495bSYour Name /* 178*5113495bSYour Name * struct direct_buf_rx_cqi_per_user_info: Per user CQI data 179*5113495bSYour Name * 180*5113495bSYour Name * @asnr_len: Average SNR length 181*5113495bSYour Name * @asnr_offset: Average SNR offset 182*5113495bSYour Name * @fb_params: Feedback params, [1:0] Nc 183*5113495bSYour Name * @peer_mac: Peer macaddr 184*5113495bSYour Name */ 185*5113495bSYour Name struct direct_buf_rx_cqi_per_user_info { 186*5113495bSYour Name uint16_t asnr_len; 187*5113495bSYour Name uint16_t asnr_offset; 188*5113495bSYour Name uint32_t fb_params; 189*5113495bSYour Name struct qdf_mac_addr peer_mac; 190*5113495bSYour Name }; 191*5113495bSYour Name 192*5113495bSYour Name /** 193*5113495bSYour Name * struct direct_buf_rx_cqi_metadata: direct buffer metadata for CQI upload 194*5113495bSYour Name * 195*5113495bSYour Name * @num_users: Number of user info in a metadta buffer 196*5113495bSYour Name * @is_valid: Set cqi metadata is valid, 197*5113495bSYour Name * false if sw_peer_id is invalid or FCS error 198*5113495bSYour Name * @fb_type: Feedback type, 0 for SU 1 for MU 2 for CQI 199*5113495bSYour Name * @fb_params: Feedback params 200*5113495bSYour Name * [0] is_valid0 201*5113495bSYour Name * [1] is_valid1 202*5113495bSYour Name * [2] is_valid2 203*5113495bSYour Name * [4:3] Nc0 204*5113495bSYour Name * [5:4] Nc1 205*5113495bSYour Name * [6:5] Nc2 206*5113495bSYour Name * @user_info: Per user CQI info 207*5113495bSYour Name */ 208*5113495bSYour Name struct direct_buf_rx_cqi_metadata { 209*5113495bSYour Name uint8_t num_users; 210*5113495bSYour Name uint32_t is_valid; 211*5113495bSYour Name uint32_t fb_type; 212*5113495bSYour Name uint32_t fb_params; 213*5113495bSYour Name struct direct_buf_rx_cqi_per_user_info user_info[MAX_NUM_CQI_USERS]; 214*5113495bSYour Name }; 215*5113495bSYour Name 216*5113495bSYour Name /** 217*5113495bSYour Name * struct direct_buf_rx_entry: direct buffer rx release entry structure 218*5113495bSYour Name * 219*5113495bSYour Name * @paddr_lo: LSB 32-bits of the buffer 220*5113495bSYour Name * @paddr_hi: MSB 32-bits of the buffer 221*5113495bSYour Name * @len: Length of the buffer 222*5113495bSYour Name */ 223*5113495bSYour Name struct direct_buf_rx_entry { 224*5113495bSYour Name uint32_t paddr_lo; 225*5113495bSYour Name uint32_t paddr_hi; 226*5113495bSYour Name uint32_t len; 227*5113495bSYour Name }; 228*5113495bSYour Name 229*5113495bSYour Name #endif /* _WMI_UNIFIED_DBR_PARAM_H_ */ 230