1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2012-2019, 2021 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name /** 21*5113495bSYour Name * DOC: This file contains centralized definitions of converged configuration. 22*5113495bSYour Name */ 23*5113495bSYour Name 24*5113495bSYour Name #ifndef __CFG_CHAINMASK_H 25*5113495bSYour Name #define __CFG_CHAINMASK_H 26*5113495bSYour Name 27*5113495bSYour Name /* 28*5113495bSYour Name * <ini> 29*5113495bSYour Name * gSetTxChainmask1x1 - Sets Transmit chain mask. 30*5113495bSYour Name * @Min: 0 31*5113495bSYour Name * @Max: 3 32*5113495bSYour Name * @Default: 1 33*5113495bSYour Name * 34*5113495bSYour Name * This ini Sets Transmit chain mask. 35*5113495bSYour Name * 36*5113495bSYour Name * If gEnable2x2 is disabled, gSetTxChainmask1x1 and gSetRxChainmask1x1 values 37*5113495bSYour Name * are taken into account. If chainmask value exceeds the maximum number of 38*5113495bSYour Name * chains supported by target, the max number of chains is used. By default, 39*5113495bSYour Name * chain0 is selected for both Tx and Rx. 40*5113495bSYour Name * gSetTxChainmask1x1=1 or gSetRxChainmask1x1=1 to select chain0. 41*5113495bSYour Name * gSetTxChainmask1x1=2 or gSetRxChainmask1x1=2 to select chain1. 42*5113495bSYour Name * gSetTxChainmask1x1=3 or gSetRxChainmask1x1=3 to select both chains. 43*5113495bSYour Name * 44*5113495bSYour Name * Supported Feature: 11AC 45*5113495bSYour Name * 46*5113495bSYour Name * Usage: External 47*5113495bSYour Name * 48*5113495bSYour Name * </ini> 49*5113495bSYour Name */ 50*5113495bSYour Name #define CFG_VHT_ENABLE_1x1_TX_CHAINMASK CFG_INI_UINT( \ 51*5113495bSYour Name "gSetTxChainmask1x1", \ 52*5113495bSYour Name 0, \ 53*5113495bSYour Name 3, \ 54*5113495bSYour Name 1, \ 55*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 56*5113495bSYour Name "1x1 VHT Tx Chainmask") 57*5113495bSYour Name 58*5113495bSYour Name /* 59*5113495bSYour Name * <ini> 60*5113495bSYour Name * gSetRxChainmask1x1 - Sets Receive chain mask. 61*5113495bSYour Name * @Min: 0 62*5113495bSYour Name * @Max: 3 63*5113495bSYour Name * @Default: 1 64*5113495bSYour Name * 65*5113495bSYour Name * This ini is used to set Receive chain mask. 66*5113495bSYour Name * 67*5113495bSYour Name * If gEnable2x2 is disabled, gSetTxChainmask1x1 and gSetRxChainmask1x1 values 68*5113495bSYour Name * are taken into account. If chainmask value exceeds the maximum number of 69*5113495bSYour Name * chains supported by target, the max number of chains is used. By default, 70*5113495bSYour Name * chain0 is selected for both Tx and Rx. 71*5113495bSYour Name * gSetTxChainmask1x1=1 or gSetRxChainmask1x1=1 to select chain0. 72*5113495bSYour Name * gSetTxChainmask1x1=2 or gSetRxChainmask1x1=2 to select chain1. 73*5113495bSYour Name * gSetTxChainmask1x1=3 or gSetRxChainmask1x1=3 to select both chains. 74*5113495bSYour Name * 75*5113495bSYour Name * Supported Feature: 11AC 76*5113495bSYour Name * 77*5113495bSYour Name * Usage: External 78*5113495bSYour Name * 79*5113495bSYour Name * </ini> 80*5113495bSYour Name */ 81*5113495bSYour Name #define CFG_VHT_ENABLE_1x1_RX_CHAINMASK CFG_INI_UINT( \ 82*5113495bSYour Name "gSetRxChainmask1x1", \ 83*5113495bSYour Name 0, \ 84*5113495bSYour Name 3, \ 85*5113495bSYour Name 1, \ 86*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 87*5113495bSYour Name "1x1 VHT Rx Chainmask") 88*5113495bSYour Name 89*5113495bSYour Name /* 90*5113495bSYour Name * <ini> 91*5113495bSYour Name * gCckChainMaskEnable - Used to enable/disable Cck ChainMask 92*5113495bSYour Name * @Min: 0 93*5113495bSYour Name * @Max: 1 94*5113495bSYour Name * @Default: 0 95*5113495bSYour Name * 96*5113495bSYour Name * This ini is used to set default Cck ChainMask 97*5113495bSYour Name * 0: disable the cck tx chain mask (default) 98*5113495bSYour Name * 1: enable the cck tx chain mask 99*5113495bSYour Name * 100*5113495bSYour Name * Related: None 101*5113495bSYour Name * 102*5113495bSYour Name * Supported Feature: STA 103*5113495bSYour Name * 104*5113495bSYour Name * Usage: Internal/External 105*5113495bSYour Name * 106*5113495bSYour Name * </ini> 107*5113495bSYour Name */ 108*5113495bSYour Name #define CFG_TX_CHAIN_MASK_CCK CFG_INI_BOOL( \ 109*5113495bSYour Name "gCckChainMaskEnable", \ 110*5113495bSYour Name 0, \ 111*5113495bSYour Name "Set default CCK Tx Chainmask") 112*5113495bSYour Name 113*5113495bSYour Name /* 114*5113495bSYour Name * <ini> 115*5113495bSYour Name * gTxChainMask1ss - Enables/disables tx chain mask1ss, used by Rome 116*5113495bSYour Name * @Min: 0 117*5113495bSYour Name * @Max: 3 118*5113495bSYour Name * @Default: 0 119*5113495bSYour Name * 120*5113495bSYour Name * This ini is used to set default tx chain mask for 1ss 121*5113495bSYour Name * 122*5113495bSYour Name * gTxChainMask1ss=0 : 1ss data tx chain mask set to 3 and self gen chain mask 123*5113495bSYour Name * set to 3. This is default setting of fw side. For 1x1 case, WIFI will 124*5113495bSYour Name * using chain0 to sent 1ss data and selfgen packets. 2x2 case, WIFI will 125*5113495bSYour Name * using chain0 and chain1 to sent 1ss data and selfgen packets. 126*5113495bSYour Name * 127*5113495bSYour Name * gTxChainMask1ss=1 : 1ss data tx chain mask set to 2 and self gen chain mask 128*5113495bSYour Name * set to 2. This setting can work only when 2x2 case, WIFI will use chain1 129*5113495bSYour Name * to sent 1ss data packets and selfgen packets, this can improve BTC 130*5113495bSYour Name * performance a little, but have side affect when chain0 and chain1 RSSI 131*5113495bSYour Name * is unbalance or green AP is enabled. So we recommend not using it. 132*5113495bSYour Name * 133*5113495bSYour Name * gTxChainMask1ss=2 : 1ss data tx chain mask set to 3 and self gen chain mask 134*5113495bSYour Name * set to 2. This setting never used before. 135*5113495bSYour Name * 136*5113495bSYour Name * gTxChainMask1ss=3 : 1ss data tx chain mask set to 2 and self gen chain mask 137*5113495bSYour Name * set to 3. This setting never used before. 138*5113495bSYour Name * 139*5113495bSYour Name * Related: None 140*5113495bSYour Name * 141*5113495bSYour Name * Supported Feature: STA/SAP 142*5113495bSYour Name * 143*5113495bSYour Name * Usage: Internal/External 144*5113495bSYour Name * 145*5113495bSYour Name * </ini> 146*5113495bSYour Name */ 147*5113495bSYour Name #define CFG_TX_CHAIN_MASK_1SS CFG_INI_UINT( \ 148*5113495bSYour Name "gTxChainMask1ss", \ 149*5113495bSYour Name 0, \ 150*5113495bSYour Name 3, \ 151*5113495bSYour Name 0, \ 152*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 153*5113495bSYour Name "1SS Tx Chainmask") 154*5113495bSYour Name 155*5113495bSYour Name /* 156*5113495bSYour Name * <ini> 157*5113495bSYour Name * g11bNumTxChains - Number of Tx Chanins in 11b mode 158*5113495bSYour Name * @Min: 0 159*5113495bSYour Name * @Max: 2 160*5113495bSYour Name * @Default: 0 161*5113495bSYour Name * 162*5113495bSYour Name * Number of Tx Chanins in 11b mode 163*5113495bSYour Name * 164*5113495bSYour Name * 165*5113495bSYour Name * Related: None 166*5113495bSYour Name * 167*5113495bSYour Name * Supported Feature: connection 168*5113495bSYour Name * 169*5113495bSYour Name * Usage: External 170*5113495bSYour Name * 171*5113495bSYour Name * </ini> 172*5113495bSYour Name */ 173*5113495bSYour Name #define CFG_11B_NUM_TX_CHAIN CFG_INI_UINT( \ 174*5113495bSYour Name "g11bNumTxChains", \ 175*5113495bSYour Name 0, \ 176*5113495bSYour Name 2, \ 177*5113495bSYour Name 0, \ 178*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 179*5113495bSYour Name "11b Num Tx chains") 180*5113495bSYour Name 181*5113495bSYour Name /* 182*5113495bSYour Name * <ini> 183*5113495bSYour Name * g11agNumTxChains - Number of Tx Chanins in 11ag mode 184*5113495bSYour Name * @Min: 0 185*5113495bSYour Name * @Max: 2 186*5113495bSYour Name * @Default: 0 187*5113495bSYour Name * 188*5113495bSYour Name * Number of Tx Chanins in 11ag mode 189*5113495bSYour Name * 190*5113495bSYour Name * 191*5113495bSYour Name * Related: None 192*5113495bSYour Name * 193*5113495bSYour Name * Supported Feature: connection 194*5113495bSYour Name * 195*5113495bSYour Name * Usage: External 196*5113495bSYour Name * 197*5113495bSYour Name * </ini> 198*5113495bSYour Name */ 199*5113495bSYour Name #define CFG_11AG_NUM_TX_CHAIN CFG_INI_UINT( \ 200*5113495bSYour Name "g11agNumTxChains", \ 201*5113495bSYour Name 0, \ 202*5113495bSYour Name 2, \ 203*5113495bSYour Name 0, \ 204*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 205*5113495bSYour Name "11ag Num Tx chains") 206*5113495bSYour Name 207*5113495bSYour Name /* 208*5113495bSYour Name * <ini> 209*5113495bSYour Name * tx_chain_mask_2g - tx chain mask for 2g 210*5113495bSYour Name * @Min: 0 211*5113495bSYour Name * @Max: 4 212*5113495bSYour Name * @Default: 0 213*5113495bSYour Name * 214*5113495bSYour Name * This ini will set tx chain mask for 2g. To use the ini, make sure: 215*5113495bSYour Name * gSetTxChainmask1x1/gSetRxChainmask1x1 = 0, 216*5113495bSYour Name * gDualMacFeatureDisable = 1 217*5113495bSYour Name * gEnable2x2 = 0 218*5113495bSYour Name * 219*5113495bSYour Name * tx_chain_mask_2g=0 : don't care 220*5113495bSYour Name * tx_chain_mask_2g=1 : for 2g tx use chain 0 221*5113495bSYour Name * tx_chain_mask_2g=2 : for 2g tx use chain 1 222*5113495bSYour Name * tx_chain_mask_2g=3 : for 2g tx can use either chain 223*5113495bSYour Name * 224*5113495bSYour Name * QCN7605 DBS chip has 3 RF chains. 225*5113495bSYour Name * Chain0 for 2G, Chain1 for 2G/5G, Chain2 for 5G. 226*5113495bSYour Name * DBS mode need 3 bits to map chainmask and halphy. 227*5113495bSYour Name * In HW design, PHYA0 always Connects to shared RF chain1. 228*5113495bSYour Name * tx_chain_mask_2g=4 : for 2g tx chain use PHYB and chain 0 229*5113495bSYour Name * 230*5113495bSYour Name * Related: None 231*5113495bSYour Name * 232*5113495bSYour Name * Supported Feature: All profiles 233*5113495bSYour Name * 234*5113495bSYour Name * Usage: External 235*5113495bSYour Name * 236*5113495bSYour Name * </ini> 237*5113495bSYour Name */ 238*5113495bSYour Name #define CFG_TX_CHAIN_MASK_2G CFG_INI_UINT( \ 239*5113495bSYour Name "tx_chain_mask_2g", \ 240*5113495bSYour Name 0, \ 241*5113495bSYour Name 4, \ 242*5113495bSYour Name 0, \ 243*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 244*5113495bSYour Name "2.4G Tx Chainmask") 245*5113495bSYour Name 246*5113495bSYour Name /* 247*5113495bSYour Name * <ini> 248*5113495bSYour Name * rx_chain_mask_2g - rx chain mask for 2g 249*5113495bSYour Name * @Min: 0 250*5113495bSYour Name * @Max: 4 251*5113495bSYour Name * @Default: 0 252*5113495bSYour Name * 253*5113495bSYour Name * This ini will set rx chain mask for 2g. To use the ini, make sure: 254*5113495bSYour Name * gSetTxChainmask1x1/gSetRxChainmask1x1 = 0, 255*5113495bSYour Name * gDualMacFeatureDisable = 1 256*5113495bSYour Name * gEnable2x2 = 0 257*5113495bSYour Name * 258*5113495bSYour Name * rx_chain_mask_2g=0 : don't care 259*5113495bSYour Name * rx_chain_mask_2g=1 : for 2g rx use chain 0 260*5113495bSYour Name * rx_chain_mask_2g=2 : for 2g rx use chain 1 261*5113495bSYour Name * rx_chain_mask_2g=3 : for 2g rx can use either chain 262*5113495bSYour Name * 263*5113495bSYour Name * QCN7605 DBS chip has 3 RF chains. 264*5113495bSYour Name * Chain0 for 2G, Chain1 for 2G/5G, Chain2 for 5G. 265*5113495bSYour Name * DBS mode need 3 bits to map chainmask and halphy. 266*5113495bSYour Name * In HW design, PHYA0 always Connects to shared RF chain1. 267*5113495bSYour Name * rx_chain_mask_2g=4 : for 2g rx chain use PHYB and chain 0 268*5113495bSYour Name * 269*5113495bSYour Name * Related: None 270*5113495bSYour Name * 271*5113495bSYour Name * Supported Feature: All profiles 272*5113495bSYour Name * 273*5113495bSYour Name * Usage: External 274*5113495bSYour Name * 275*5113495bSYour Name * </ini> 276*5113495bSYour Name */ 277*5113495bSYour Name #define CFG_RX_CHAIN_MASK_2G CFG_INI_UINT( \ 278*5113495bSYour Name "rx_chain_mask_2g", \ 279*5113495bSYour Name 0, \ 280*5113495bSYour Name 4, \ 281*5113495bSYour Name 0, \ 282*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 283*5113495bSYour Name "2.4G Rx Chainmask") 284*5113495bSYour Name 285*5113495bSYour Name /* 286*5113495bSYour Name * <ini> 287*5113495bSYour Name * tx_chain_mask_5g - tx chain mask for 5g 288*5113495bSYour Name * @Min: 0 289*5113495bSYour Name * @Max: 6 290*5113495bSYour Name * @Default: 0 291*5113495bSYour Name * 292*5113495bSYour Name * This ini will set tx chain mask for 5g. To use the ini, make sure: 293*5113495bSYour Name * gSetTxChainmask1x1/gSetRxChainmask1x1 = 0, 294*5113495bSYour Name * gDualMacFeatureDisable = 1 295*5113495bSYour Name * gEnable2x2 = 0 296*5113495bSYour Name * 297*5113495bSYour Name * tx_chain_mask_5g=0 : don't care 298*5113495bSYour Name * tx_chain_mask_5g=1 : for 5g tx use chain 0, Genoa use chain 1 299*5113495bSYour Name * tx_chain_mask_5g=2 : for 5g tx use chain 1, Genoa use chain 2 300*5113495bSYour Name * tx_chain_mask_5g=3 : for 5g tx can use either chain 301*5113495bSYour Name * 302*5113495bSYour Name * QCN7605 DBS chip has 3 RF chains. 303*5113495bSYour Name * Chain0 for 2G, Chain1 for 2G/5G, Chain2 for 5G. 304*5113495bSYour Name * DBS mode need 3 bits to map chainmask and halphy. 305*5113495bSYour Name * In HW design, PHYA0 always Connects to shared RF chain1. 306*5113495bSYour Name * tx_chain_mask_5g=4 : for 5g tx chain use PHYB and chain 2 307*5113495bSYour Name * tx_chain_mask_5g=5 : for 5g tx chain use PHYA and chain 1 308*5113495bSYour Name * tx_chain_mask_5g=6 : for 5g tx chain use PHYA and chain 2 309*5113495bSYour Name * 310*5113495bSYour Name * Related: None 311*5113495bSYour Name * 312*5113495bSYour Name * Supported Feature: All profiles 313*5113495bSYour Name * 314*5113495bSYour Name * Usage: External 315*5113495bSYour Name * 316*5113495bSYour Name * </ini> 317*5113495bSYour Name */ 318*5113495bSYour Name #define CFG_TX_CHAIN_MASK_5G CFG_INI_UINT( \ 319*5113495bSYour Name "tx_chain_mask_5g", \ 320*5113495bSYour Name 0, \ 321*5113495bSYour Name 6, \ 322*5113495bSYour Name 0, \ 323*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 324*5113495bSYour Name "5Ghz Tx Chainmask") 325*5113495bSYour Name 326*5113495bSYour Name /* 327*5113495bSYour Name * <ini> 328*5113495bSYour Name * rx_chain_mask_5g - rx chain mask for 5g 329*5113495bSYour Name * @Min: 0 330*5113495bSYour Name * @Max: 6 331*5113495bSYour Name * @Default: 0 332*5113495bSYour Name * 333*5113495bSYour Name * This ini will set rx chain mask for 5g. To use the ini, make sure: 334*5113495bSYour Name * gSetTxChainmask1x1/gSetRxChainmask1x1 = 0, 335*5113495bSYour Name * gDualMacFeatureDisable = 1 336*5113495bSYour Name * gEnable2x2 = 0 337*5113495bSYour Name * 338*5113495bSYour Name * rx_chain_mask_5g=0 : don't care 339*5113495bSYour Name * rx_chain_mask_5g=1 : for 5g rx use chain 0, Genoa use chain 1 340*5113495bSYour Name * rx_chain_mask_5g=2 : for 5g rx use chain 1, Genoa use chain 2 341*5113495bSYour Name * rx_chain_mask_5g=3 : for 5g rx can use either chain 342*5113495bSYour Name * 343*5113495bSYour Name * QCN7605 DBS chip has 3 RF chains. 344*5113495bSYour Name * Chain0 for 2G, Chain1 for 2G/5G, Chain2 for 5G. 345*5113495bSYour Name * DBS mode need 3 bits to map halphy and chain. 346*5113495bSYour Name * HW design, PHYA0 always Connects to shared RF chain1. 347*5113495bSYour Name * rx_chain_mask_5g=4 : for 5g rx chain use PHYB and chain 2 348*5113495bSYour Name * rx_chain_mask_5g=5 : for 5g rx chain use PHYA and chain 1 349*5113495bSYour Name * rx_chain_mask_5g=6 : for 5g rx chain use PHYB and chain 2 350*5113495bSYour Name * 351*5113495bSYour Name * Related: None 352*5113495bSYour Name * 353*5113495bSYour Name * Supported Feature: All profiles 354*5113495bSYour Name * 355*5113495bSYour Name * Usage: External 356*5113495bSYour Name * 357*5113495bSYour Name * </ini> 358*5113495bSYour Name */ 359*5113495bSYour Name #define CFG_RX_CHAIN_MASK_5G CFG_INI_UINT( \ 360*5113495bSYour Name "rx_chain_mask_5g", \ 361*5113495bSYour Name 0, \ 362*5113495bSYour Name 6, \ 363*5113495bSYour Name 0, \ 364*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 365*5113495bSYour Name "5Ghz Rx Chainmask") 366*5113495bSYour Name 367*5113495bSYour Name /* 368*5113495bSYour Name * <ini> 369*5113495bSYour Name * enable_bt_chain_separation - Enables/disables bt /wlan chainmask assignment 370*5113495bSYour Name * @Min: 0 371*5113495bSYour Name * @Max: 1 372*5113495bSYour Name * @Default: 0 373*5113495bSYour Name * 374*5113495bSYour Name * This ini disables/enables chainmask setting on 2x2, mainly used for ROME 375*5113495bSYour Name * BT/WLAN chainmask assignment. 376*5113495bSYour Name * 377*5113495bSYour Name * 0, Disable 378*5113495bSYour Name * 1, Enable 379*5113495bSYour Name * 380*5113495bSYour Name * Related: NA 381*5113495bSYour Name * 382*5113495bSYour Name * Supported Feature: 11n/11ac 383*5113495bSYour Name * 384*5113495bSYour Name * Usage: External 385*5113495bSYour Name * 386*5113495bSYour Name * </ini> 387*5113495bSYour Name */ 388*5113495bSYour Name #define CFG_ENABLE_BT_CHAIN_SEPARATION CFG_INI_BOOL( \ 389*5113495bSYour Name "enableBTChainSeparation", \ 390*5113495bSYour Name 0, \ 391*5113495bSYour Name "Enable/disable BT chainmask assignment") 392*5113495bSYour Name 393*5113495bSYour Name #define CFG_CHAINMASK_ALL \ 394*5113495bSYour Name CFG(CFG_VHT_ENABLE_1x1_TX_CHAINMASK) \ 395*5113495bSYour Name CFG(CFG_VHT_ENABLE_1x1_RX_CHAINMASK) \ 396*5113495bSYour Name CFG(CFG_TX_CHAIN_MASK_CCK) \ 397*5113495bSYour Name CFG(CFG_TX_CHAIN_MASK_1SS) \ 398*5113495bSYour Name CFG(CFG_11B_NUM_TX_CHAIN) \ 399*5113495bSYour Name CFG(CFG_11AG_NUM_TX_CHAIN) \ 400*5113495bSYour Name CFG(CFG_TX_CHAIN_MASK_2G) \ 401*5113495bSYour Name CFG(CFG_RX_CHAIN_MASK_2G) \ 402*5113495bSYour Name CFG(CFG_TX_CHAIN_MASK_5G) \ 403*5113495bSYour Name CFG(CFG_RX_CHAIN_MASK_5G) \ 404*5113495bSYour Name CFG(CFG_ENABLE_BT_CHAIN_SEPARATION) 405*5113495bSYour Name 406*5113495bSYour Name #endif /* __CFG_CHAINMASK_H */ 407