1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2012-2021 The Linux Foundation. All rights reserved. 3*5113495bSYour Name * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name /** 21*5113495bSYour Name * DOC: This file contains centralized definitions of converged configuration. 22*5113495bSYour Name */ 23*5113495bSYour Name 24*5113495bSYour Name #ifndef __CFG_MLME_HE_CAPS_H 25*5113495bSYour Name #define __CFG_MLME_HE_CAPS_H 26*5113495bSYour Name 27*5113495bSYour Name #define CFG_HE_CONTROL CFG_BOOL( \ 28*5113495bSYour Name "he_control", \ 29*5113495bSYour Name 0, \ 30*5113495bSYour Name "HE Control") 31*5113495bSYour Name 32*5113495bSYour Name #define CFG_HE_FRAGMENTATION CFG_UINT( \ 33*5113495bSYour Name "he_fragmentation", \ 34*5113495bSYour Name 0, \ 35*5113495bSYour Name 3, \ 36*5113495bSYour Name 0, \ 37*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 38*5113495bSYour Name "HE Fragmentation") 39*5113495bSYour Name 40*5113495bSYour Name #define CFG_HE_MAX_FRAG_MSDU CFG_UINT( \ 41*5113495bSYour Name "he_max_frag_msdu", \ 42*5113495bSYour Name 0, \ 43*5113495bSYour Name 7, \ 44*5113495bSYour Name 0, \ 45*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 46*5113495bSYour Name "HE Max Frag Msdu") 47*5113495bSYour Name 48*5113495bSYour Name #define CFG_HE_MIN_FRAG_SIZE CFG_UINT( \ 49*5113495bSYour Name "he_min_frag_size", \ 50*5113495bSYour Name 0, \ 51*5113495bSYour Name 3, \ 52*5113495bSYour Name 0, \ 53*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 54*5113495bSYour Name "HE Min Frag Size") 55*5113495bSYour Name 56*5113495bSYour Name #define CFG_HE_TRIG_PAD CFG_UINT( \ 57*5113495bSYour Name "he_trig_pad", \ 58*5113495bSYour Name 0, \ 59*5113495bSYour Name 2, \ 60*5113495bSYour Name 2, \ 61*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 62*5113495bSYour Name "HE Trig Pad") 63*5113495bSYour Name 64*5113495bSYour Name #define CFG_HE_MTID_AGGR_RX CFG_UINT( \ 65*5113495bSYour Name "he_mtid_aggr_rx", \ 66*5113495bSYour Name 0, \ 67*5113495bSYour Name 7, \ 68*5113495bSYour Name 0, \ 69*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 70*5113495bSYour Name "HE Mtid Aggr") 71*5113495bSYour Name 72*5113495bSYour Name #define CFG_HE_LINK_ADAPTATION CFG_UINT( \ 73*5113495bSYour Name "he_link_adaptation", \ 74*5113495bSYour Name 0, \ 75*5113495bSYour Name 3, \ 76*5113495bSYour Name 0, \ 77*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 78*5113495bSYour Name "HE Link Adaptation") 79*5113495bSYour Name 80*5113495bSYour Name #define CFG_HE_ALL_ACK CFG_BOOL( \ 81*5113495bSYour Name "he_all_ack", \ 82*5113495bSYour Name 0, \ 83*5113495bSYour Name "HE All Ack") 84*5113495bSYour Name 85*5113495bSYour Name #define CFG_HE_TRIGD_RSP_SCHEDULING CFG_BOOL( \ 86*5113495bSYour Name "he_trigd_rsp_scheduling", \ 87*5113495bSYour Name 0, \ 88*5113495bSYour Name "HE Trigd Rsp Scheduling") 89*5113495bSYour Name 90*5113495bSYour Name #define CFG_HE_BUFFER_STATUS_RPT CFG_BOOL( \ 91*5113495bSYour Name "he_buffer_status_rpt", \ 92*5113495bSYour Name 0, \ 93*5113495bSYour Name "HE Buffer Status Rpt") 94*5113495bSYour Name 95*5113495bSYour Name #define CFG_HE_BA_32BIT CFG_BOOL( \ 96*5113495bSYour Name "he_ba_32bit", \ 97*5113495bSYour Name 0, \ 98*5113495bSYour Name "HE BA 32Bit") 99*5113495bSYour Name 100*5113495bSYour Name #define CFG_HE_MU_CASCADING CFG_BOOL( \ 101*5113495bSYour Name "he_mu_cascading", \ 102*5113495bSYour Name 0, \ 103*5113495bSYour Name "HE Mu Cascading") 104*5113495bSYour Name 105*5113495bSYour Name #define CFG_HE_MULTI_TID CFG_BOOL( \ 106*5113495bSYour Name "he_multi_tid", \ 107*5113495bSYour Name 0, \ 108*5113495bSYour Name "HE Multi Tid") 109*5113495bSYour Name 110*5113495bSYour Name #define CFG_HE_OMI CFG_BOOL( \ 111*5113495bSYour Name "he_omi", \ 112*5113495bSYour Name 0, \ 113*5113495bSYour Name "HE Omi") 114*5113495bSYour Name 115*5113495bSYour Name #define CFG_HE_OFDMA_RA CFG_BOOL( \ 116*5113495bSYour Name "he_ofdma_ra", \ 117*5113495bSYour Name 0, \ 118*5113495bSYour Name "HE Ofdma Ra") 119*5113495bSYour Name 120*5113495bSYour Name #define CFG_HE_MAX_AMPDU_LEN CFG_INI_UINT( \ 121*5113495bSYour Name "he_max_ampdu_len", \ 122*5113495bSYour Name 0, \ 123*5113495bSYour Name 3, \ 124*5113495bSYour Name 3, \ 125*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 126*5113495bSYour Name "HE Max Ampdu Len") 127*5113495bSYour Name 128*5113495bSYour Name #define CFG_HE_AMSDU_FRAG CFG_BOOL( \ 129*5113495bSYour Name "he_amspdu_frag", \ 130*5113495bSYour Name 0, \ 131*5113495bSYour Name "HE Amsdu Frag") 132*5113495bSYour Name 133*5113495bSYour Name #define CFG_HE_FLEX_TWT_SCHED CFG_BOOL( \ 134*5113495bSYour Name "he_flex_twt_sched", \ 135*5113495bSYour Name 0, \ 136*5113495bSYour Name "HE Flex Twt Sched") 137*5113495bSYour Name 138*5113495bSYour Name #define CFG_HE_RX_CTRL CFG_BOOL( \ 139*5113495bSYour Name "he_rx_ctrl", \ 140*5113495bSYour Name 0, \ 141*5113495bSYour Name "HE Rx Ctrl") 142*5113495bSYour Name 143*5113495bSYour Name #define CFG_HE_BSRP_AMPDU_AGGR CFG_BOOL( \ 144*5113495bSYour Name "he_bsrp_ampdu_aggr", \ 145*5113495bSYour Name 0, \ 146*5113495bSYour Name "He Bspr Ampdu Aggr") 147*5113495bSYour Name 148*5113495bSYour Name #define CFG_HE_QTP CFG_BOOL( \ 149*5113495bSYour Name "he_qtp", \ 150*5113495bSYour Name 0, \ 151*5113495bSYour Name "He Qtp") 152*5113495bSYour Name 153*5113495bSYour Name #define CFG_HE_A_BQR CFG_BOOL( \ 154*5113495bSYour Name "he_a_bqr", \ 155*5113495bSYour Name 0, \ 156*5113495bSYour Name "He A Bqr") 157*5113495bSYour Name 158*5113495bSYour Name #define CFG_HE_SR_RESPONDER CFG_BOOL( \ 159*5113495bSYour Name "he_sr_responder", \ 160*5113495bSYour Name 0, \ 161*5113495bSYour Name "He Sr Responder") 162*5113495bSYour Name 163*5113495bSYour Name #define CFG_HE_NDP_FEEDBACK_SUPP CFG_BOOL( \ 164*5113495bSYour Name "he_ndp_feedback_supp", \ 165*5113495bSYour Name 0, \ 166*5113495bSYour Name "He Ndp Feedback Supp") 167*5113495bSYour Name 168*5113495bSYour Name #define CFG_HE_OPS_SUPP CFG_BOOL( \ 169*5113495bSYour Name "he_ops_supp", \ 170*5113495bSYour Name 0, \ 171*5113495bSYour Name "He Ops Supp") 172*5113495bSYour Name 173*5113495bSYour Name #define CFG_HE_AMSDU_IN_AMPDU CFG_BOOL( \ 174*5113495bSYour Name "he_amsdu_in_ampdu", \ 175*5113495bSYour Name 0, \ 176*5113495bSYour Name "He Amsdu In Ampdu") 177*5113495bSYour Name 178*5113495bSYour Name #define CFG_HE_MTID_AGGR_TX CFG_UINT( \ 179*5113495bSYour Name "he_mtid_aggr_tx", \ 180*5113495bSYour Name 0, \ 181*5113495bSYour Name 0x7, \ 182*5113495bSYour Name 0, \ 183*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 184*5113495bSYour Name "He MTid Aggr Tx") 185*5113495bSYour Name 186*5113495bSYour Name #define CFG_HE_SUB_CH_SEL_TX CFG_BOOL( \ 187*5113495bSYour Name "he_sub_ch_sel_tx", \ 188*5113495bSYour Name 0, \ 189*5113495bSYour Name "He Sub cg sel tx") 190*5113495bSYour Name 191*5113495bSYour Name #define CFG_HE_UL_2X996_RU CFG_BOOL( \ 192*5113495bSYour Name "he_ul_2x996_ru", \ 193*5113495bSYour Name 0, \ 194*5113495bSYour Name "He Ul 2x996 Ru") 195*5113495bSYour Name 196*5113495bSYour Name #define CFG_HE_OM_CTRL_UL_MU_DIS_RX CFG_BOOL( \ 197*5113495bSYour Name "he_om_ctrl_ul_mu_dis_rx", \ 198*5113495bSYour Name 0, \ 199*5113495bSYour Name "He Om Ctrl Ul My Dis Rx") 200*5113495bSYour Name 201*5113495bSYour Name #define CFG_HE_DYNAMIC_SMPS CFG_BOOL( \ 202*5113495bSYour Name "he_dynamic_smps", \ 203*5113495bSYour Name 0, \ 204*5113495bSYour Name "He Dynamic SMPS") 205*5113495bSYour Name 206*5113495bSYour Name #define CFG_HE_PUNCTURED_SOUNDING CFG_BOOL( \ 207*5113495bSYour Name "he_punctured_sounding", \ 208*5113495bSYour Name 0, \ 209*5113495bSYour Name "He Punctured Sounding") 210*5113495bSYour Name 211*5113495bSYour Name #define CFG_HE_HT_VHT_TRG_FRM_RX CFG_BOOL( \ 212*5113495bSYour Name "ht_vht_trg_frm_rx", \ 213*5113495bSYour Name 0, \ 214*5113495bSYour Name "HT VHT Trigger frame Rx") 215*5113495bSYour Name 216*5113495bSYour Name #define CFG_HE_CHAN_WIDTH CFG_UINT( \ 217*5113495bSYour Name "he_chan_width", \ 218*5113495bSYour Name 0, \ 219*5113495bSYour Name 0x3F, \ 220*5113495bSYour Name 0, \ 221*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 222*5113495bSYour Name "He Chan Width") 223*5113495bSYour Name 224*5113495bSYour Name #define CFG_HE_RX_PREAM_PUNC CFG_INI_UINT( \ 225*5113495bSYour Name "he_rx_pream_punc", \ 226*5113495bSYour Name 0, \ 227*5113495bSYour Name 0xF, \ 228*5113495bSYour Name 0x3, \ 229*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 230*5113495bSYour Name "He Rx Pream Punc") 231*5113495bSYour Name 232*5113495bSYour Name #define CFG_HE_CLASS_OF_DEVICE CFG_BOOL( \ 233*5113495bSYour Name "he_class_of_device", \ 234*5113495bSYour Name 0, \ 235*5113495bSYour Name "He Class Of Device") 236*5113495bSYour Name 237*5113495bSYour Name #define CFG_HE_LDPC CFG_BOOL( \ 238*5113495bSYour Name "he_ldpc", \ 239*5113495bSYour Name 0, \ 240*5113495bSYour Name "He Ldpc") 241*5113495bSYour Name 242*5113495bSYour Name #define CFG_HE_LTF_PPDU CFG_UINT( \ 243*5113495bSYour Name "he_ltf_ppdu", \ 244*5113495bSYour Name 0, \ 245*5113495bSYour Name 3, \ 246*5113495bSYour Name 0, \ 247*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 248*5113495bSYour Name "He Ltf Ppdu") 249*5113495bSYour Name 250*5113495bSYour Name #define CFG_HE_MIDAMBLE_RX_MAX_NSTS CFG_UINT( \ 251*5113495bSYour Name "he_midamble_rx_max_nsts", \ 252*5113495bSYour Name 0, \ 253*5113495bSYour Name 3, \ 254*5113495bSYour Name 0, \ 255*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 256*5113495bSYour Name "He Midamble Rx Max Nsts") 257*5113495bSYour Name 258*5113495bSYour Name #define CFG_HE_LTF_NDP CFG_UINT( \ 259*5113495bSYour Name "he_ltf_ndp", \ 260*5113495bSYour Name 0, \ 261*5113495bSYour Name 3, \ 262*5113495bSYour Name 0, \ 263*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 264*5113495bSYour Name "He Ltf Ndp") 265*5113495bSYour Name 266*5113495bSYour Name #define CFG_HE_TX_STBC_LT80 CFG_BOOL( \ 267*5113495bSYour Name "he_tx_stbc_lt80_sta", \ 268*5113495bSYour Name 0, \ 269*5113495bSYour Name "He Tx Stbc Lt80") 270*5113495bSYour Name 271*5113495bSYour Name #define CFG_HE_RX_STBC_LT80 CFG_BOOL( \ 272*5113495bSYour Name "he_rx_stbc_lt80", \ 273*5113495bSYour Name 0, \ 274*5113495bSYour Name "He Rx Stbc Lt80") 275*5113495bSYour Name 276*5113495bSYour Name #define CFG_HE_DOPPLER CFG_UINT( \ 277*5113495bSYour Name "he_doppler", \ 278*5113495bSYour Name 0, \ 279*5113495bSYour Name 3, \ 280*5113495bSYour Name 0, \ 281*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 282*5113495bSYour Name "He Doppler") 283*5113495bSYour Name 284*5113495bSYour Name #define CFG_HE_DCM_TX CFG_UINT( \ 285*5113495bSYour Name "he_dcm_tx", \ 286*5113495bSYour Name 0, \ 287*5113495bSYour Name 7, \ 288*5113495bSYour Name 0, \ 289*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 290*5113495bSYour Name "He Dcm Tx") 291*5113495bSYour Name 292*5113495bSYour Name #define CFG_HE_DCM_RX CFG_UINT( \ 293*5113495bSYour Name "he_dcm_rx", \ 294*5113495bSYour Name 0, \ 295*5113495bSYour Name 7, \ 296*5113495bSYour Name 0, \ 297*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 298*5113495bSYour Name "He Dcm Rx") 299*5113495bSYour Name 300*5113495bSYour Name #define CFG_HE_MU_PPDU CFG_BOOL( \ 301*5113495bSYour Name "he_mu_ppdu", \ 302*5113495bSYour Name 0, \ 303*5113495bSYour Name "He Mu Ppdu") 304*5113495bSYour Name 305*5113495bSYour Name #define CFG_HE_SU_BEAMFORMER CFG_BOOL( \ 306*5113495bSYour Name "he_su_beamformer", \ 307*5113495bSYour Name 0, \ 308*5113495bSYour Name "He Su Beamformer") 309*5113495bSYour Name 310*5113495bSYour Name #define CFG_HE_SU_BEAMFORMEE CFG_BOOL( \ 311*5113495bSYour Name "he_su_beamformee", \ 312*5113495bSYour Name 0, \ 313*5113495bSYour Name "He Su Beamformee") 314*5113495bSYour Name 315*5113495bSYour Name #define CFG_HE_MU_BEAMFORMER CFG_BOOL( \ 316*5113495bSYour Name "he_mu_beamformer", \ 317*5113495bSYour Name 0, \ 318*5113495bSYour Name "He Mu Beamformer") 319*5113495bSYour Name 320*5113495bSYour Name #define CFG_HE_BFEE_STS_LT80 CFG_UINT( \ 321*5113495bSYour Name "he_bfee_sts_lt80", \ 322*5113495bSYour Name 0, \ 323*5113495bSYour Name 7, \ 324*5113495bSYour Name 0, \ 325*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 326*5113495bSYour Name "He Mu Bfee Sts Lt80") 327*5113495bSYour Name 328*5113495bSYour Name #define CFG_HE_BFEE_STS_GT80 CFG_UINT( \ 329*5113495bSYour Name "he_bfee_sts_lt80", \ 330*5113495bSYour Name 0, \ 331*5113495bSYour Name 7, \ 332*5113495bSYour Name 0, \ 333*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 334*5113495bSYour Name "He Mu Bfee Sts Gt80") 335*5113495bSYour Name 336*5113495bSYour Name #define CFG_HE_NUM_SOUND_LT80 CFG_UINT( \ 337*5113495bSYour Name "he_num_sound_lt80", \ 338*5113495bSYour Name 0, \ 339*5113495bSYour Name 7, \ 340*5113495bSYour Name 0, \ 341*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 342*5113495bSYour Name "He Num Sound Lt80") 343*5113495bSYour Name 344*5113495bSYour Name #define CFG_HE_NUM_SOUND_GT80 CFG_UINT( \ 345*5113495bSYour Name "he_num_sound_gt80", \ 346*5113495bSYour Name 0, \ 347*5113495bSYour Name 7, \ 348*5113495bSYour Name 0, \ 349*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 350*5113495bSYour Name "He Num Sound Gt80") 351*5113495bSYour Name 352*5113495bSYour Name #define CFG_HE_SU_FEED_TONE16 CFG_BOOL( \ 353*5113495bSYour Name "he_su_feed_tone16", \ 354*5113495bSYour Name 0, \ 355*5113495bSYour Name "He Su Feed Tone16") 356*5113495bSYour Name 357*5113495bSYour Name #define CFG_HE_MU_FEED_TONE16 CFG_BOOL( \ 358*5113495bSYour Name "he_mu_feed_tone16", \ 359*5113495bSYour Name 0, \ 360*5113495bSYour Name "He Mu Feed Tone16") 361*5113495bSYour Name 362*5113495bSYour Name #define CFG_HE_CODEBOOK_SU CFG_BOOL( \ 363*5113495bSYour Name "he_codebook_su", \ 364*5113495bSYour Name 0, \ 365*5113495bSYour Name "He Codebook Su") 366*5113495bSYour Name 367*5113495bSYour Name #define CFG_HE_CODEBOOK_MU CFG_BOOL( \ 368*5113495bSYour Name "he_codebook_mu", \ 369*5113495bSYour Name 0, \ 370*5113495bSYour Name "He Codebook Mu") 371*5113495bSYour Name 372*5113495bSYour Name #define CFG_HE_BFRM_FEED CFG_UINT( \ 373*5113495bSYour Name "he_bfrm_feed", \ 374*5113495bSYour Name 0, \ 375*5113495bSYour Name 7, \ 376*5113495bSYour Name 0, \ 377*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 378*5113495bSYour Name "He Bfrm Feed") 379*5113495bSYour Name 380*5113495bSYour Name #define CFG_HE_ER_SU_PPDU CFG_BOOL( \ 381*5113495bSYour Name "he_bfrm_feed", \ 382*5113495bSYour Name 0, \ 383*5113495bSYour Name "He Er Su Ppdu") 384*5113495bSYour Name 385*5113495bSYour Name #define CFG_HE_DL_PART_BW CFG_BOOL( \ 386*5113495bSYour Name "he_dl_part_bw", \ 387*5113495bSYour Name 0, \ 388*5113495bSYour Name "He Dl Part Bw") 389*5113495bSYour Name 390*5113495bSYour Name #define CFG_HE_PPET_PRESENT CFG_BOOL( \ 391*5113495bSYour Name "he_ppet_present", \ 392*5113495bSYour Name 0, \ 393*5113495bSYour Name "He Pper Present") 394*5113495bSYour Name 395*5113495bSYour Name #define CFG_HE_SRP CFG_BOOL( \ 396*5113495bSYour Name "he_srp", \ 397*5113495bSYour Name 0, \ 398*5113495bSYour Name "He Srp") 399*5113495bSYour Name 400*5113495bSYour Name #define CFG_HE_POWER_BOOST CFG_BOOL( \ 401*5113495bSYour Name "he_power_boost", \ 402*5113495bSYour Name 0, \ 403*5113495bSYour Name "He Power Boost") 404*5113495bSYour Name 405*5113495bSYour Name #define CFG_HE_4x_LTF_GI CFG_BOOL( \ 406*5113495bSYour Name "he_4x_ltf_gi", \ 407*5113495bSYour Name 0, \ 408*5113495bSYour Name "He 4x Ltf Gi") 409*5113495bSYour Name 410*5113495bSYour Name #define CFG_HE_MAX_NC CFG_UINT( \ 411*5113495bSYour Name "he_max_nc", \ 412*5113495bSYour Name 0, \ 413*5113495bSYour Name 7, \ 414*5113495bSYour Name 0, \ 415*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 416*5113495bSYour Name "He Max Nc") 417*5113495bSYour Name 418*5113495bSYour Name #define CFG_HE_RX_STBC_GT80 CFG_BOOL( \ 419*5113495bSYour Name "he_rx_stbc_gt80", \ 420*5113495bSYour Name 0, \ 421*5113495bSYour Name "He Rx Stbc Gt80") 422*5113495bSYour Name 423*5113495bSYour Name #define CFG_HE_TX_STBC_GT80 CFG_BOOL( \ 424*5113495bSYour Name "he_Tx_stbc_gt80", \ 425*5113495bSYour Name 0, \ 426*5113495bSYour Name "He Tx Stbc Gt80") 427*5113495bSYour Name 428*5113495bSYour Name #define CFG_HE_ER_4x_LTF_GI CFG_BOOL( \ 429*5113495bSYour Name "he_er_4x_ltf_gi", \ 430*5113495bSYour Name 0, \ 431*5113495bSYour Name "He Er 4x Ltf Gi") 432*5113495bSYour Name 433*5113495bSYour Name #define CFG_HE_PPDU_20_IN_40MHZ_2G CFG_BOOL( \ 434*5113495bSYour Name "he_ppdu_20_in_40mhz_2g", \ 435*5113495bSYour Name 0, \ 436*5113495bSYour Name "He Ppdu 20 In 40Mhz 2g") 437*5113495bSYour Name 438*5113495bSYour Name #define CFG_HE_PPDU_20_IN_160_80P80MHZ CFG_BOOL( \ 439*5113495bSYour Name "he_ppdu_20_in_160_80p80mhz", \ 440*5113495bSYour Name 0, \ 441*5113495bSYour Name "He Ppdu 20 In 160 80p80mhz") 442*5113495bSYour Name 443*5113495bSYour Name #define CFG_HE_PPDU_80_IN_160_80P80MHZ CFG_BOOL( \ 444*5113495bSYour Name "he_ppdu_80_in_160_80p80mhz", \ 445*5113495bSYour Name 0, \ 446*5113495bSYour Name "He Ppdu 80 In 160 80p80mhz") 447*5113495bSYour Name 448*5113495bSYour Name #define CFG_HE_ER_1X_HE_LTF_GI CFG_BOOL( \ 449*5113495bSYour Name "he_er_1x_he_ltf_gi", \ 450*5113495bSYour Name 0, \ 451*5113495bSYour Name "He Er 1x He Ltf Gi") 452*5113495bSYour Name 453*5113495bSYour Name #define CFG_HE_MIDAMBLE_TXRX_1X_HE_LTF CFG_BOOL( \ 454*5113495bSYour Name "he_midamble_txrx_1x_he_ltf", \ 455*5113495bSYour Name 0, \ 456*5113495bSYour Name "He Midamble Tx Rx 1x He Ltf") 457*5113495bSYour Name 458*5113495bSYour Name #define CFG_HE_DCM_MAX_BW CFG_UINT( \ 459*5113495bSYour Name "he_dcm_max_bw", \ 460*5113495bSYour Name 0, \ 461*5113495bSYour Name 3, \ 462*5113495bSYour Name 0, \ 463*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 464*5113495bSYour Name "He Dcm Max Bw") 465*5113495bSYour Name 466*5113495bSYour Name #define CFG_HE_LONGER_16_SIGB_OFDM_SYM CFG_BOOL( \ 467*5113495bSYour Name "he_longer_16_sigb_ofdm_sys", \ 468*5113495bSYour Name 0, \ 469*5113495bSYour Name "He Longer 16 Sigb Ofdm Sys") 470*5113495bSYour Name 471*5113495bSYour Name #define CFG_HE_NON_TRIG_CQI_FEEDBACK CFG_BOOL( \ 472*5113495bSYour Name "he_rx_mcs_map_lt_80", \ 473*5113495bSYour Name 0, \ 474*5113495bSYour Name "He Non Trig Cqi Feedback") 475*5113495bSYour Name 476*5113495bSYour Name #define CFG_HE_TX_1024_QAM_LT_242_RU CFG_BOOL( \ 477*5113495bSYour Name "he_tx_1024_qam_lt_242_ru", \ 478*5113495bSYour Name 0, \ 479*5113495bSYour Name "He Tx 1024 Qam Lt 242 Ru") 480*5113495bSYour Name 481*5113495bSYour Name #define CFG_HE_RX_1024_QAM_LT_242_RU CFG_BOOL( \ 482*5113495bSYour Name "he_rx_1024_qam_lt_242_ru", \ 483*5113495bSYour Name 0, \ 484*5113495bSYour Name "He Rx 1024 Qam Lt 242 Ru") 485*5113495bSYour Name 486*5113495bSYour Name #define CFG_HE_RX_FULL_BW_MU_CMPR_SIGB CFG_BOOL( \ 487*5113495bSYour Name "he_rx_full_bw_cmpr_sigb", \ 488*5113495bSYour Name 0, \ 489*5113495bSYour Name "He Rx Full Bw Mu Cmpr Sigb") 490*5113495bSYour Name 491*5113495bSYour Name #define CFG_HE_RX_FULL_BW_MU_NON_CMPR_SIGB CFG_BOOL( \ 492*5113495bSYour Name "he_rx_full_bw_mu_non_cmpr_sigb", \ 493*5113495bSYour Name 0, \ 494*5113495bSYour Name "He Rx Full Bw Mu Non Cmpr Sigb") 495*5113495bSYour Name 496*5113495bSYour Name /* 11AX related INI configuration */ 497*5113495bSYour Name /* 498*5113495bSYour Name * <ini> 499*5113495bSYour Name * he_rx_mcs_map_lt_80 - configure Rx HE-MCS Map for ≤ 80 MHz 500*5113495bSYour Name * @Min: 0 501*5113495bSYour Name * @Max: 0xFFFF 502*5113495bSYour Name * @Default: 0xFFFA 503*5113495bSYour Name * 504*5113495bSYour Name * This ini is used to configure Rx HE-MCS Map for ≤ 80 MHz 505*5113495bSYour Name * 0:1 Max HE-MCS For 1 SS 506*5113495bSYour Name * 2:3 Max HE-MCS For 2 SS 507*5113495bSYour Name * 4:5 Max HE-MCS For 3 SS 508*5113495bSYour Name * 6:7 Max HE-MCS For 4 SS 509*5113495bSYour Name * 8:9 Max HE-MCS For 5 SS 510*5113495bSYour Name * 10:11 Max HE-MCS For 6 SS 511*5113495bSYour Name * 12:13 Max HE-MCS For 7 SS 512*5113495bSYour Name * 14:15 Max HE-MCS For 8 SS 513*5113495bSYour Name * 514*5113495bSYour Name * 0 indicates support for HE-MCS 0-7 for n spatial streams 515*5113495bSYour Name * 1 indicates support for HE-MCS 0-9 for n spatial streams 516*5113495bSYour Name * 2 indicates support for HE-MCS 0-11 for n spatial streams 517*5113495bSYour Name * 3 indicates that n spatial streams is not supported for HE PPDUs 518*5113495bSYour Name * 519*5113495bSYour Name * Related: NA 520*5113495bSYour Name * 521*5113495bSYour Name * Supported Feature: 11AX 522*5113495bSYour Name * 523*5113495bSYour Name * Usage: External 524*5113495bSYour Name * 525*5113495bSYour Name * </ini> 526*5113495bSYour Name */ 527*5113495bSYour Name #define CFG_HE_RX_MCS_MAP_LT_80 CFG_INI_UINT( \ 528*5113495bSYour Name "he_rx_mcs_map_lt_80", \ 529*5113495bSYour Name 0, \ 530*5113495bSYour Name 0xFFFF, \ 531*5113495bSYour Name 0xFFFA, \ 532*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 533*5113495bSYour Name "He Rx Mcs Map Lt 80") 534*5113495bSYour Name 535*5113495bSYour Name /* 11AX related INI configuration */ 536*5113495bSYour Name /* 537*5113495bSYour Name * <ini> 538*5113495bSYour Name * he_tx_mcs_map_lt_80 - configure Tx HE-MCS Map for ≤ 80 MHz 539*5113495bSYour Name * @Min: 0 540*5113495bSYour Name * @Max: 0xFFFF 541*5113495bSYour Name * @Default: 0xFFFA 542*5113495bSYour Name * 543*5113495bSYour Name * This ini is used to configure Tx HE-MCS Map for ≤ 80 MHz 544*5113495bSYour Name * 0:1 Max HE-MCS For 1 SS 545*5113495bSYour Name * 2:3 Max HE-MCS For 2 SS 546*5113495bSYour Name * 4:5 Max HE-MCS For 3 SS 547*5113495bSYour Name * 6:7 Max HE-MCS For 4 SS 548*5113495bSYour Name * 8:9 Max HE-MCS For 5 SS 549*5113495bSYour Name * 10:11 Max HE-MCS For 6 SS 550*5113495bSYour Name * 12:13 Max HE-MCS For 7 SS 551*5113495bSYour Name * 14:15 Max HE-MCS For 8 SS 552*5113495bSYour Name * 553*5113495bSYour Name * 0 indicates support for HE-MCS 0-7 for n spatial streams 554*5113495bSYour Name * 1 indicates support for HE-MCS 0-9 for n spatial streams 555*5113495bSYour Name * 2 indicates support for HE-MCS 0-11 for n spatial streams 556*5113495bSYour Name * 3 indicates that n spatial streams is not supported for HE PPDUs 557*5113495bSYour Name * 558*5113495bSYour Name * Related: NA 559*5113495bSYour Name * 560*5113495bSYour Name * Supported Feature: 11AX 561*5113495bSYour Name * 562*5113495bSYour Name * Usage: External 563*5113495bSYour Name * 564*5113495bSYour Name * </ini> 565*5113495bSYour Name */ 566*5113495bSYour Name #define CFG_HE_TX_MCS_MAP_LT_80 CFG_INI_UINT( \ 567*5113495bSYour Name "he_tx_mcs_map_lt_80", \ 568*5113495bSYour Name 0, \ 569*5113495bSYour Name 0xFFFF, \ 570*5113495bSYour Name 0xFFFA, \ 571*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 572*5113495bSYour Name "He Tx Mcs Map Lt 80") 573*5113495bSYour Name /* 11AX related INI configuration */ 574*5113495bSYour Name /* 575*5113495bSYour Name * <ini> 576*5113495bSYour Name * he_rx_mcs_map_160 - configure Rx HE-MCS Map for 160 MHz 577*5113495bSYour Name * @Min: 0 578*5113495bSYour Name * @Max: 0xFFFF 579*5113495bSYour Name * @Default: 0xFFFA 580*5113495bSYour Name * 581*5113495bSYour Name * This ini is used to configure Rx HE-MCS Map for 160 MHz 582*5113495bSYour Name * 0:1 Max HE-MCS For 1 SS 583*5113495bSYour Name * 2:3 Max HE-MCS For 2 SS 584*5113495bSYour Name * 4:5 Max HE-MCS For 3 SS 585*5113495bSYour Name * 6:7 Max HE-MCS For 4 SS 586*5113495bSYour Name * 8:9 Max HE-MCS For 5 SS 587*5113495bSYour Name * 10:11 Max HE-MCS For 6 SS 588*5113495bSYour Name * 12:13 Max HE-MCS For 7 SS 589*5113495bSYour Name * 14:15 Max HE-MCS For 8 SS 590*5113495bSYour Name * 591*5113495bSYour Name * 0 indicates support for HE-MCS 0-7 for n spatial streams 592*5113495bSYour Name * 1 indicates support for HE-MCS 0-9 for n spatial streams 593*5113495bSYour Name * 2 indicates support for HE-MCS 0-11 for n spatial streams 594*5113495bSYour Name * 3 indicates that n spatial streams is not supported for HE PPDUs 595*5113495bSYour Name * 596*5113495bSYour Name * Related: NA 597*5113495bSYour Name * 598*5113495bSYour Name * Supported Feature: 11AX 599*5113495bSYour Name * 600*5113495bSYour Name * Usage: External 601*5113495bSYour Name * 602*5113495bSYour Name * </ini> 603*5113495bSYour Name */ 604*5113495bSYour Name #define CFG_HE_RX_MCS_MAP_160 CFG_INI_UINT( \ 605*5113495bSYour Name "he_rx_mcs_map_160", \ 606*5113495bSYour Name 0, \ 607*5113495bSYour Name 0xFFFF, \ 608*5113495bSYour Name 0xFFFA, \ 609*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 610*5113495bSYour Name "He Rx Mcs Map 160") 611*5113495bSYour Name 612*5113495bSYour Name /* 11AX related INI configuration */ 613*5113495bSYour Name /* 614*5113495bSYour Name * <ini> 615*5113495bSYour Name * he_tx_mcs_map_160 - configure Tx HE-MCS Map for 160 MHz 616*5113495bSYour Name * @Min: 0 617*5113495bSYour Name * @Max: 0xFFFF 618*5113495bSYour Name * @Default: 0xFFFA 619*5113495bSYour Name * 620*5113495bSYour Name * This ini is used to configure Tx HE-MCS Map for 160 MHz 621*5113495bSYour Name * 0:1 Max HE-MCS For 1 SS 622*5113495bSYour Name * 2:3 Max HE-MCS For 2 SS 623*5113495bSYour Name * 4:5 Max HE-MCS For 3 SS 624*5113495bSYour Name * 6:7 Max HE-MCS For 4 SS 625*5113495bSYour Name * 8:9 Max HE-MCS For 5 SS 626*5113495bSYour Name * 10:11 Max HE-MCS For 6 SS 627*5113495bSYour Name * 12:13 Max HE-MCS For 7 SS 628*5113495bSYour Name * 14:15 Max HE-MCS For 8 SS 629*5113495bSYour Name * 630*5113495bSYour Name * 0 indicates support for HE-MCS 0-7 for n spatial streams 631*5113495bSYour Name * 1 indicates support for HE-MCS 0-9 for n spatial streams 632*5113495bSYour Name * 2 indicates support for HE-MCS 0-11 for n spatial streams 633*5113495bSYour Name * 3 indicates that n spatial streams is not supported for HE PPDUs 634*5113495bSYour Name * 635*5113495bSYour Name * Related: NA 636*5113495bSYour Name * 637*5113495bSYour Name * Supported Feature: 11AX 638*5113495bSYour Name * 639*5113495bSYour Name * Usage: External 640*5113495bSYour Name * 641*5113495bSYour Name * </ini> 642*5113495bSYour Name */ 643*5113495bSYour Name #define CFG_HE_TX_MCS_MAP_160 CFG_INI_UINT( \ 644*5113495bSYour Name "he_tx_mcs_map_160", \ 645*5113495bSYour Name 0, \ 646*5113495bSYour Name 0xFFFF, \ 647*5113495bSYour Name 0xFFFA, \ 648*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 649*5113495bSYour Name "He Tx Mcs Map 160") 650*5113495bSYour Name 651*5113495bSYour Name #define CFG_HE_RX_MCS_MAP_80_80 CFG_UINT( \ 652*5113495bSYour Name "he_rx_mcs_map_80_80", \ 653*5113495bSYour Name 0, \ 654*5113495bSYour Name 0xFFFF, \ 655*5113495bSYour Name 0xFFF0, \ 656*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 657*5113495bSYour Name "He Rx Mcs Map 80 80") 658*5113495bSYour Name 659*5113495bSYour Name #define CFG_HE_TX_MCS_MAP_80_80 CFG_UINT( \ 660*5113495bSYour Name "he_tx_mcs_map_80_80", \ 661*5113495bSYour Name 0, \ 662*5113495bSYour Name 0xFFFF, \ 663*5113495bSYour Name 0xFFF0, \ 664*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 665*5113495bSYour Name "He tx Mcs Map 80 80") 666*5113495bSYour Name 667*5113495bSYour Name #define CFG_HE_OPS_BASIC_MCS_NSS CFG_UINT( \ 668*5113495bSYour Name "cfg_he_ops_basic_mcs_nss", \ 669*5113495bSYour Name 0x0000, \ 670*5113495bSYour Name 0xFFFF, \ 671*5113495bSYour Name 0xFFFC, \ 672*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 673*5113495bSYour Name "He Ops Basic Mcs NSS") 674*5113495bSYour Name 675*5113495bSYour Name /* 11AX related INI configuration */ 676*5113495bSYour Name /* 677*5113495bSYour Name * <ini> 678*5113495bSYour Name * he_ul_mumimo - configure ul mu capabilities 679*5113495bSYour Name * @Min: 0 680*5113495bSYour Name * @Max: 3 681*5113495bSYour Name * @Default: 0 682*5113495bSYour Name * 683*5113495bSYour Name * This ini is used to configure capabilities of ul mu-mimo 684*5113495bSYour Name * 0-> no support 685*5113495bSYour Name * 1-> full bandwidth support 686*5113495bSYour Name * 2-> partial bandwidth support 687*5113495bSYour Name * 3-> full and partial bandwidth support 688*5113495bSYour Name * 689*5113495bSYour Name * Related: NA 690*5113495bSYour Name * 691*5113495bSYour Name * Supported Feature: 11AX 692*5113495bSYour Name * 693*5113495bSYour Name * Usage: Internal/External 694*5113495bSYour Name * 695*5113495bSYour Name * </ini> 696*5113495bSYour Name */ 697*5113495bSYour Name #define CFG_HE_UL_MUMIMO CFG_INI_UINT( \ 698*5113495bSYour Name "he_ul_mumimo", \ 699*5113495bSYour Name 0, \ 700*5113495bSYour Name 3, \ 701*5113495bSYour Name 0, \ 702*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 703*5113495bSYour Name "He Ul Mumimo") 704*5113495bSYour Name 705*5113495bSYour Name /* 11AX related INI configuration */ 706*5113495bSYour Name /* 707*5113495bSYour Name * <ini> 708*5113495bSYour Name * he_dynamic_frag_support - configure dynamic fragmentation 709*5113495bSYour Name * @Min: 0 710*5113495bSYour Name * @Max: 3 711*5113495bSYour Name * @Default: 0 712*5113495bSYour Name * 713*5113495bSYour Name * This ini is used to configure dynamic fragmentation. 714*5113495bSYour Name * 715*5113495bSYour Name * Related: NA 716*5113495bSYour Name * 717*5113495bSYour Name * Supported Feature: 11AX 718*5113495bSYour Name * 719*5113495bSYour Name * Usage: Internal/External 720*5113495bSYour Name * 721*5113495bSYour Name * </ini> 722*5113495bSYour Name */ 723*5113495bSYour Name #define CFG_HE_DYNAMIC_FRAGMENTATION CFG_INI_UINT( \ 724*5113495bSYour Name "he_dynamic_frag_support", \ 725*5113495bSYour Name 0, \ 726*5113495bSYour Name 3, \ 727*5113495bSYour Name 0, \ 728*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 729*5113495bSYour Name "HE Dynamic Fragmentation") 730*5113495bSYour Name 731*5113495bSYour Name 732*5113495bSYour Name /* 733*5113495bSYour Name * <ini> 734*5113495bSYour Name * enable_ul_mimo- Enable UL MIMO. 735*5113495bSYour Name * @Min: 0 736*5113495bSYour Name * @Max: 1 737*5113495bSYour Name * @Default: 1 738*5113495bSYour Name * 739*5113495bSYour Name * This ini is used to enable or disable UL MIMO. 740*5113495bSYour Name * 741*5113495bSYour Name * Related: NA 742*5113495bSYour Name * 743*5113495bSYour Name * Supported Feature: 11AX 744*5113495bSYour Name * 745*5113495bSYour Name * Usage: External 746*5113495bSYour Name * 747*5113495bSYour Name * </ini> 748*5113495bSYour Name */ 749*5113495bSYour Name #define CFG_ENABLE_UL_MIMO CFG_INI_BOOL( \ 750*5113495bSYour Name "enable_ul_mimo", \ 751*5113495bSYour Name 1, \ 752*5113495bSYour Name "He Enable Ul Mimo Name") 753*5113495bSYour Name 754*5113495bSYour Name /* 755*5113495bSYour Name * <ini> 756*5113495bSYour Name * enable_ul_ofdma- Enable UL OFDMA. 757*5113495bSYour Name * @Min: 0 758*5113495bSYour Name * @Max: 1 759*5113495bSYour Name * @Default: 1 760*5113495bSYour Name * 761*5113495bSYour Name * This ini is used to enable or disable UL OFDMA. 762*5113495bSYour Name * 763*5113495bSYour Name * Related: NA 764*5113495bSYour Name * 765*5113495bSYour Name * Supported Feature: 11AX 766*5113495bSYour Name * 767*5113495bSYour Name * Usage: External 768*5113495bSYour Name * 769*5113495bSYour Name * </ini> 770*5113495bSYour Name */ 771*5113495bSYour Name 772*5113495bSYour Name #define CFG_ENABLE_UL_OFDMA CFG_INI_BOOL( \ 773*5113495bSYour Name "enable_ul_ofdma", \ 774*5113495bSYour Name 1, \ 775*5113495bSYour Name "He Enable Ul Ofdma Name") 776*5113495bSYour Name 777*5113495bSYour Name /* 778*5113495bSYour Name * <ini> 779*5113495bSYour Name * he_sta_obsspd- 11AX HE OBSS PD bit field 780*5113495bSYour Name * @Min: 0 781*5113495bSYour Name * @Max: uin32_t max 782*5113495bSYour Name * @Default: 0x15b8c2ae 783*5113495bSYour Name * 784*5113495bSYour Name * 4 Byte value with each byte representing a signed value for following params: 785*5113495bSYour Name * Param Bit position Default 786*5113495bSYour Name * OBSS_PD min (primary) 7:0 -82 (0xae) 787*5113495bSYour Name * OBSS_PD max (primary) 15:8 -62 (0xc2) 788*5113495bSYour Name * Secondary channel Ed 23:16 -72 (0xb8) 789*5113495bSYour Name * TX_PWR(ref) 31:24 21 (0x15) 790*5113495bSYour Name * This bit field value is directly applied to FW 791*5113495bSYour Name * 792*5113495bSYour Name * Related: NA 793*5113495bSYour Name * 794*5113495bSYour Name * Supported Feature: 11AX 795*5113495bSYour Name * 796*5113495bSYour Name * Usage: External 797*5113495bSYour Name * 798*5113495bSYour Name * </ini> 799*5113495bSYour Name */ 800*5113495bSYour Name #define CFG_HE_STA_OBSSPD CFG_INI_UINT( \ 801*5113495bSYour Name "he_sta_obsspd", \ 802*5113495bSYour Name 0, \ 803*5113495bSYour Name 0xFFFFFFFF, \ 804*5113495bSYour Name 0x15b8c2ae, \ 805*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 806*5113495bSYour Name "He Mu Bfee Sts Gt80") 807*5113495bSYour Name 808*5113495bSYour Name /* 809*5113495bSYour Name * <ini> 810*5113495bSYour Name * he_mcs_12_13_support - Bit mask to enable MCS 12 and 13 support 811*5113495bSYour Name * @Min: 0x0 812*5113495bSYour Name * @Max: 0xffffffff 813*5113495bSYour Name * @Default: 0xffffffff 814*5113495bSYour Name * 815*5113495bSYour Name * This ini is used to set MCS 12 and 13 for 2.4Ghz and 5Ghz. first 16 816*5113495bSYour Name * bits(0-15) is for 2.4ghz and next 16 bits is for 5Ghz. Of 16 bits the lower 817*5113495bSYour Name * 8 bits represent BW less than or equal 80Mhz (<= 80Mhz) and higher 8 bits 818*5113495bSYour Name * represent BW greater than 80Mhz (> 80Mhz). nth bit in octet represent support 819*5113495bSYour Name * for nth NSS [n=1:8]. Def value is 0xFFFFFFFF which enable MCS 12 and 13 for 820*5113495bSYour Name * all NSS and BW. 821*5113495bSYour Name * 822*5113495bSYour Name * Bits Band 823*5113495bSYour Name * BIT[0:15] 2.4Ghz support for MCS 12 and 13, for NSS n[1:8] and BW <= 80Mhz 824*5113495bSYour Name * first 8 bits should be used (0-7) and for NSS n[1:8] and BW > 825*5113495bSYour Name * 80 Mhz, next 8 bits (8-15) should be used. 826*5113495bSYour Name * 827*5113495bSYour Name * BIT[16:31] 5Ghz support for MCS 12 and 13, for NSS n[1:8] and BW < 80Mhz, 828*5113495bSYour Name * bits 16-23 should be used and for BW > 80Mhz, next 8 bits 829*5113495bSYour Name * (24-31) 830*5113495bSYour Name * 831*5113495bSYour Name * Some Possible values are as below 832*5113495bSYour Name * 0 - MCS 12 and 13 disabled for 2.4Ghz and 5Ghz for all nss and 833*5113495bSYour Name * BW > 80Mz and <= 80Mhz 834*5113495bSYour Name * 0x3030303 - MCS 12 and 13 enabled for 2.4Ghz and 5Ghz for NSS 1 and 2 for 835*5113495bSYour Name * BW > 80Mhz and <= 80Mhz 836*5113495bSYour Name * 0x0303 - MCS 12 and 13 enabled for 2.4Ghz NSS 1 and 2 for BW > 80Mhz and 837*5113495bSYour Name * <= 80Mhz but disabled for 5Ghz 838*5113495bSYour Name * 0x3030000 - MCS 12 and 13 enabled for 5Ghz NSS 1 and 2 for BW > 80Mhz and 839*5113495bSYour Name * <= 80Mhz but disabled for 2.4Ghz 840*5113495bSYour Name * 0x30000 - MCS 12 and 13 enabled for 5Ghz NSS 1 and 2 for BW <= 80Mhz and 841*5113495bSYour Name * disabled for BW > 80Mhz. And disabled for 2.4Ghz 842*5113495bSYour Name * 0x3 MCS 12 and 13 enabled for 2.4Ghz NSS 1 and 2 for BW <= 80Mhz and 843*5113495bSYour Name * disabled for all 844*5113495bSYour Name * 845*5113495bSYour Name * Related: None 846*5113495bSYour Name * 847*5113495bSYour Name * Supported Feature: HE MCS 12 and 13 848*5113495bSYour Name * 849*5113495bSYour Name * Usage: Internal 850*5113495bSYour Name * 851*5113495bSYour Name * </ini> 852*5113495bSYour Name */ 853*5113495bSYour Name #define CFG_HE_MCS_12_13_SUPPORT CFG_INI_UINT("he_mcs_12_13_support", \ 854*5113495bSYour Name 0, 0xffffffff, 0xffffffff, \ 855*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 856*5113495bSYour Name "He Configure MCS_12_13 bits") 857*5113495bSYour Name 858*5113495bSYour Name /* 859*5113495bSYour Name * <ini> 860*5113495bSYour Name * disable_mcs_12_13_sap - Bitmask to disable HE MCS 12 13 support for SAP 861*5113495bSYour Name * @Min: 0 862*5113495bSYour Name * @Max: 4095 863*5113495bSYour Name * @Default: 0 864*5113495bSYour Name * 865*5113495bSYour Name * This ini is used to disable HE MCS_12_13 for SAP. 866*5113495bSYour Name * Currently only support is present to disable 2.4 GHz 40 MHz SAP for value 867*5113495bSYour Name * 2 i.e. 2nd bit set. 868*5113495bSYour Name * 869*5113495bSYour Name * Related: NA 870*5113495bSYour Name * 871*5113495bSYour Name * Usage: External 872*5113495bSYour Name * 873*5113495bSYour Name * </ini> 874*5113495bSYour Name */ 875*5113495bSYour Name #define CFG_DISABLE_MCS_12_13_SAP CFG_INI_UINT( \ 876*5113495bSYour Name "disable_mcs_12_13_sap", \ 877*5113495bSYour Name 0, 4095, 0, \ 878*5113495bSYour Name CFG_VALUE_OR_DEFAULT, \ 879*5113495bSYour Name "Disable HE MCS_12_13 for SAP") 880*5113495bSYour Name 881*5113495bSYour Name #define CFG_HE_CAPS_ALL \ 882*5113495bSYour Name CFG(CFG_HE_CONTROL) \ 883*5113495bSYour Name CFG(CFG_HE_FRAGMENTATION) \ 884*5113495bSYour Name CFG(CFG_HE_MAX_FRAG_MSDU) \ 885*5113495bSYour Name CFG(CFG_HE_MIN_FRAG_SIZE) \ 886*5113495bSYour Name CFG(CFG_HE_TRIG_PAD) \ 887*5113495bSYour Name CFG(CFG_HE_MTID_AGGR_RX) \ 888*5113495bSYour Name CFG(CFG_HE_LINK_ADAPTATION) \ 889*5113495bSYour Name CFG(CFG_HE_ALL_ACK) \ 890*5113495bSYour Name CFG(CFG_HE_TRIGD_RSP_SCHEDULING) \ 891*5113495bSYour Name CFG(CFG_HE_BUFFER_STATUS_RPT) \ 892*5113495bSYour Name CFG(CFG_HE_BA_32BIT) \ 893*5113495bSYour Name CFG(CFG_HE_MU_CASCADING) \ 894*5113495bSYour Name CFG(CFG_HE_MULTI_TID) \ 895*5113495bSYour Name CFG(CFG_HE_OMI) \ 896*5113495bSYour Name CFG(CFG_HE_OFDMA_RA) \ 897*5113495bSYour Name CFG(CFG_HE_MAX_AMPDU_LEN) \ 898*5113495bSYour Name CFG(CFG_HE_AMSDU_FRAG) \ 899*5113495bSYour Name CFG(CFG_HE_FLEX_TWT_SCHED) \ 900*5113495bSYour Name CFG(CFG_HE_RX_CTRL) \ 901*5113495bSYour Name CFG(CFG_HE_BSRP_AMPDU_AGGR) \ 902*5113495bSYour Name CFG(CFG_HE_QTP) \ 903*5113495bSYour Name CFG(CFG_HE_A_BQR) \ 904*5113495bSYour Name CFG(CFG_HE_SR_RESPONDER) \ 905*5113495bSYour Name CFG(CFG_HE_NDP_FEEDBACK_SUPP) \ 906*5113495bSYour Name CFG(CFG_HE_OPS_SUPP) \ 907*5113495bSYour Name CFG(CFG_HE_AMSDU_IN_AMPDU) \ 908*5113495bSYour Name CFG(CFG_HE_CHAN_WIDTH) \ 909*5113495bSYour Name CFG(CFG_HE_MTID_AGGR_TX) \ 910*5113495bSYour Name CFG(CFG_HE_SUB_CH_SEL_TX) \ 911*5113495bSYour Name CFG(CFG_HE_UL_2X996_RU) \ 912*5113495bSYour Name CFG(CFG_HE_OM_CTRL_UL_MU_DIS_RX) \ 913*5113495bSYour Name CFG(CFG_HE_RX_PREAM_PUNC) \ 914*5113495bSYour Name CFG(CFG_HE_CLASS_OF_DEVICE) \ 915*5113495bSYour Name CFG(CFG_HE_LDPC) \ 916*5113495bSYour Name CFG(CFG_HE_LTF_PPDU) \ 917*5113495bSYour Name CFG(CFG_HE_MIDAMBLE_RX_MAX_NSTS) \ 918*5113495bSYour Name CFG(CFG_HE_LTF_NDP) \ 919*5113495bSYour Name CFG(CFG_HE_TX_STBC_LT80) \ 920*5113495bSYour Name CFG(CFG_HE_RX_STBC_LT80) \ 921*5113495bSYour Name CFG(CFG_HE_DOPPLER) \ 922*5113495bSYour Name CFG(CFG_HE_UL_MUMIMO) \ 923*5113495bSYour Name CFG(CFG_HE_DCM_TX) \ 924*5113495bSYour Name CFG(CFG_HE_DCM_RX) \ 925*5113495bSYour Name CFG(CFG_HE_MU_PPDU) \ 926*5113495bSYour Name CFG(CFG_HE_SU_BEAMFORMER) \ 927*5113495bSYour Name CFG(CFG_HE_SU_BEAMFORMEE) \ 928*5113495bSYour Name CFG(CFG_HE_MU_BEAMFORMER) \ 929*5113495bSYour Name CFG(CFG_HE_BFEE_STS_LT80) \ 930*5113495bSYour Name CFG(CFG_HE_BFEE_STS_GT80) \ 931*5113495bSYour Name CFG(CFG_HE_NUM_SOUND_LT80) \ 932*5113495bSYour Name CFG(CFG_HE_NUM_SOUND_GT80) \ 933*5113495bSYour Name CFG(CFG_HE_SU_FEED_TONE16) \ 934*5113495bSYour Name CFG(CFG_HE_MU_FEED_TONE16) \ 935*5113495bSYour Name CFG(CFG_HE_CODEBOOK_SU) \ 936*5113495bSYour Name CFG(CFG_HE_CODEBOOK_MU) \ 937*5113495bSYour Name CFG(CFG_HE_BFRM_FEED) \ 938*5113495bSYour Name CFG(CFG_HE_ER_SU_PPDU) \ 939*5113495bSYour Name CFG(CFG_HE_DL_PART_BW) \ 940*5113495bSYour Name CFG(CFG_HE_PPET_PRESENT) \ 941*5113495bSYour Name CFG(CFG_HE_SRP) \ 942*5113495bSYour Name CFG(CFG_HE_POWER_BOOST) \ 943*5113495bSYour Name CFG(CFG_HE_4x_LTF_GI) \ 944*5113495bSYour Name CFG(CFG_HE_MAX_NC) \ 945*5113495bSYour Name CFG(CFG_HE_RX_STBC_GT80) \ 946*5113495bSYour Name CFG(CFG_HE_TX_STBC_GT80) \ 947*5113495bSYour Name CFG(CFG_HE_ER_4x_LTF_GI) \ 948*5113495bSYour Name CFG(CFG_HE_PPDU_20_IN_40MHZ_2G) \ 949*5113495bSYour Name CFG(CFG_HE_PPDU_20_IN_160_80P80MHZ) \ 950*5113495bSYour Name CFG(CFG_HE_PPDU_80_IN_160_80P80MHZ) \ 951*5113495bSYour Name CFG(CFG_HE_ER_1X_HE_LTF_GI) \ 952*5113495bSYour Name CFG(CFG_HE_MIDAMBLE_TXRX_1X_HE_LTF) \ 953*5113495bSYour Name CFG(CFG_HE_DCM_MAX_BW) \ 954*5113495bSYour Name CFG(CFG_HE_LONGER_16_SIGB_OFDM_SYM) \ 955*5113495bSYour Name CFG(CFG_HE_NON_TRIG_CQI_FEEDBACK) \ 956*5113495bSYour Name CFG(CFG_HE_TX_1024_QAM_LT_242_RU) \ 957*5113495bSYour Name CFG(CFG_HE_RX_1024_QAM_LT_242_RU) \ 958*5113495bSYour Name CFG(CFG_HE_RX_FULL_BW_MU_CMPR_SIGB) \ 959*5113495bSYour Name CFG(CFG_HE_RX_FULL_BW_MU_NON_CMPR_SIGB) \ 960*5113495bSYour Name CFG(CFG_HE_RX_MCS_MAP_LT_80) \ 961*5113495bSYour Name CFG(CFG_HE_TX_MCS_MAP_LT_80) \ 962*5113495bSYour Name CFG(CFG_HE_RX_MCS_MAP_160) \ 963*5113495bSYour Name CFG(CFG_HE_TX_MCS_MAP_160) \ 964*5113495bSYour Name CFG(CFG_HE_RX_MCS_MAP_80_80) \ 965*5113495bSYour Name CFG(CFG_HE_TX_MCS_MAP_80_80) \ 966*5113495bSYour Name CFG(CFG_HE_OPS_BASIC_MCS_NSS) \ 967*5113495bSYour Name CFG(CFG_HE_DYNAMIC_FRAGMENTATION) \ 968*5113495bSYour Name CFG(CFG_ENABLE_UL_MIMO) \ 969*5113495bSYour Name CFG(CFG_ENABLE_UL_OFDMA) \ 970*5113495bSYour Name CFG(CFG_HE_STA_OBSSPD) \ 971*5113495bSYour Name CFG(CFG_HE_MCS_12_13_SUPPORT) \ 972*5113495bSYour Name CFG(CFG_DISABLE_MCS_12_13_SAP) 973*5113495bSYour Name 974*5113495bSYour Name #endif /* __CFG_MLME_HE_CAPS_H */ 975*5113495bSYour Name 976